Lines Matching refs:SOC_SINGLE
334 SOC_SINGLE("HW Noise Gate Enable", CS35L41_NG_CFG, 8, 63, 0),
335 SOC_SINGLE("HW Noise Gate Delay", CS35L41_NG_CFG, 4, 7, 0),
336 SOC_SINGLE("HW Noise Gate Threshold", CS35L41_NG_CFG, 0, 7, 0),
337 SOC_SINGLE("Aux Noise Gate CH1 Switch",
339 SOC_SINGLE("Aux Noise Gate CH1 Entry Delay",
341 SOC_SINGLE("Aux Noise Gate CH1 Threshold",
343 SOC_SINGLE("Aux Noise Gate CH2 Entry Delay",
345 SOC_SINGLE("Aux Noise Gate CH2 Switch",
347 SOC_SINGLE("Aux Noise Gate CH2 Threshold",
349 SOC_SINGLE("SCLK Force Switch", CS35L41_SP_FORMAT, CS35L41_SCLK_FRC_SHIFT, 1, 0),
350 SOC_SINGLE("LRCLK Force Switch", CS35L41_SP_FORMAT, CS35L41_LRCLK_FRC_SHIFT, 1, 0),
351 SOC_SINGLE("Invert Class D Switch", CS35L41_AMP_DIG_VOL_CTRL,
353 SOC_SINGLE("Amp Gain ZC Switch", CS35L41_AMP_GAIN_CTRL,