Lines Matching defs:adau
26 #include "adau-utils.h"
75 struct adau *adau = snd_soc_component_get_drvdata(component);
78 adau->pll_regs[5] = 1;
80 adau->pll_regs[5] = 0;
83 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
88 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
89 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
93 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
105 struct adau *adau = snd_soc_component_get_drvdata(component);
114 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
116 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
190 struct adau *adau = snd_soc_component_get_drvdata(component);
203 adau->dsp_bypass[stream] = false;
206 val = (adau->tdm_slot[stream] * 2) + 1;
207 adau->dsp_bypass[stream] = true;
234 struct adau *adau = snd_soc_component_get_drvdata(component);
245 ret = regmap_read(adau->regmap, reg, &val);
324 static bool adau17x1_has_dsp(struct adau *adau)
326 switch (adau->type) {
337 static bool adau17x1_has_disused_dsp(struct adau *adau)
339 switch (adau->type) {
347 static bool adau17x1_has_safeload(struct adau *adau)
349 switch (adau->type) {
362 struct adau *adau = snd_soc_component_get_drvdata(component);
368 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
373 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
374 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
378 adau->pll_freq = freq_out;
387 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
396 if (!adau->mclk)
406 switch (adau->clk_src) {
418 adau->sysclk = freq;
430 adau->clk_src = clk_id;
438 struct adau *adau = snd_soc_dai_get_drvdata(dai);
465 clk_get_rate(adau->mclk), pll_rate);
472 struct adau *adau = snd_soc_component_get_drvdata(component);
477 switch (adau->clk_src) {
484 freq = adau->pll_freq;
487 freq = adau->sysclk;
527 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
530 if (adau17x1_has_dsp(adau) || adau17x1_has_disused_dsp(adau))
531 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
532 if (adau17x1_has_dsp(adau))
533 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
535 if (adau->sigmadsp) {
541 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
558 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
565 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
573 adau->master = true;
577 adau->master = false;
633 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0_mask,
635 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
638 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
646 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
666 if (adau->type == ADAU1361)
677 if (adau->type == ADAU1761 || adau->type == ADAU1761_AS_1361)
692 if (adau->type == ADAU1361)
704 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
708 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
712 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
716 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
725 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
729 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
733 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
737 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
743 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
745 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
747 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
749 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
752 if (!adau17x1_has_dsp(adau) && !adau17x1_has_disused_dsp(adau))
755 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
756 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
757 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
760 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
761 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
762 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
771 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
773 if (adau->sigmadsp)
774 return sigmadsp_restrict_params(adau->sigmadsp, substream);
792 struct adau *adau = snd_soc_component_get_drvdata(component);
802 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
883 struct adau *adau = snd_soc_component_get_drvdata(component);
892 if (adau->sigmadsp->current_samplerate == rate)
897 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
901 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
905 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
906 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
907 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
909 ret = sigmadsp_setup(adau->sigmadsp, rate);
911 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
914 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
915 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
926 struct adau *adau = snd_soc_component_get_drvdata(component);
938 if (adau17x1_has_dsp(adau)) {
944 if (!adau->sigmadsp)
947 ret = sigmadsp_attach(adau->sigmadsp, component);
962 struct adau *adau = snd_soc_component_get_drvdata(component);
970 if (adau17x1_has_dsp(adau)) {
978 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
987 struct adau *adau = snd_soc_component_get_drvdata(component);
989 if (adau->switch_mode)
990 adau->switch_mode(component->dev);
992 regcache_sync(adau->regmap);
1052 struct adau *adau;
1058 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1059 if (!adau)
1063 adau->mclk = devm_clk_get_optional(dev, "mclk");
1064 if (IS_ERR(adau->mclk))
1065 return PTR_ERR(adau->mclk);
1067 if (adau->mclk) {
1068 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1075 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1076 adau->pll_regs);
1080 ret = clk_prepare_enable(adau->mclk);
1085 adau->regmap = regmap;
1086 adau->switch_mode = switch_mode;
1087 adau->type = type;
1089 dev_set_drvdata(dev, adau);
1092 if (adau17x1_has_safeload(adau)) {
1093 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1096 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1099 if (IS_ERR(adau->sigmadsp)) {
1101 PTR_ERR(adau->sigmadsp));
1102 adau->sigmadsp = NULL;
1115 struct adau *adau = dev_get_drvdata(dev);
1117 clk_disable_unprepare(adau->mclk);