pci/rme9652/rme9652.c

158 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
194 	u32 control_register;	/* cached value */
338 	i = rme9652->control_register & RME9652_latency;
415 	s->control_register |= (RME9652_IE | RME9652_start_bit);
416 	rme9652_write(s, RME9652_control_register, s->control_register);
421 	s->control_register &= ~(RME9652_start_bit | RME9652_IE);
422 	rme9652_write(s, RME9652_control_register, s->control_register);
444 	s->control_register &= ~RME9652_latency;
445 	s->control_register |= rme9652_encode_latency(n);
447 	rme9652_write(s, RME9652_control_register, s->control_register);
521 	rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
522 	rme9652->control_register |= rate;
523 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
594 		rme9652->control_register =
602 			      rme9652->control_register);
616 		rme9652->control_register |= mask;
618 		rme9652->control_register &= ~mask;
620 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
688 	rme9652->control_register |= RME9652_SPDIF_RESET;
833 	rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
834 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
860 	if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
870 		rme9652->control_register |= RME9652_ADAT1_INTERNAL;
872 		rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
881 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
930 	return rme9652_decode_spdif_in(rme9652->control_register &
938 	rme9652->control_register &= ~RME9652_inp;
939 	rme9652->control_register |= rme9652_encode_spdif_in(in);
945 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
994 	return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1002 		rme9652->control_register |= RME9652_opt_out;
1004 		rme9652->control_register &= ~RME9652_opt_out;
1011 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1054 	if (rme9652->control_register & RME9652_wsel) {
1056 	} else if (rme9652->control_register & RME9652_Master) {
1069 		rme9652->control_register &=
1073 		rme9652->control_register =
1074 		    (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1077 		rme9652->control_register |=
1086 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1134 	switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1152 	rme9652->control_register &= ~RME9652_SyncPref_Mask;
1155 		rme9652->control_register |= RME9652_SyncPref_ADAT1;
1158 		rme9652->control_register |= RME9652_SyncPref_ADAT2;
1161 		rme9652->control_register |= RME9652_SyncPref_ADAT3;
1164 		rme9652->control_register |= RME9652_SyncPref_SPDIF;
1172 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1553 	snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1557 	x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1567 	if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1570 	} else if (rme9652->control_register & RME9652_wsel) {
1581 		switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1601 			    (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1606 	switch (rme9652_decode_spdif_in(rme9652->control_register &
1622 	if (rme9652->control_register & RME9652_opt_out) {
1628 	if (rme9652->control_register & RME9652_PRO) {
1634 	if (rme9652->control_register & RME9652_EMP) {
1640 	if (rme9652->control_register & RME9652_Dolby) {
1775 	rme9652->control_register =
1778 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1938 		rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1939 		rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);