pci/pcxhr/pcxhr_mix22.c

36 #define PCXHR_INPB(mgr, x)	inb((mgr)->port[PCXHR_DSP] + (x))
37 #define PCXHR_OUTPB(mgr, x, data) outb((data), (mgr)->port[PCXHR_DSP] + (x))
206 static void hr222_config_akm(struct pcxhr_mgr *mgr, unsigned short data)
210 	PCXHR_INPB(mgr, PCXHR_XLX_HIFREQ);
213 		PCXHR_OUTPB(mgr, PCXHR_XLX_DATA,
218 	PCXHR_INPB(mgr, PCXHR_XLX_RUER);
222 static int hr222_set_hw_playback_level(struct pcxhr_mgr *mgr,
239 	hr222_config_akm(mgr, cmd);
244 static int hr222_set_hw_capture_level(struct pcxhr_mgr *mgr,
251 	if (!mgr->capture_chips)
259 	PCXHR_INPB(mgr, PCXHR_XLX_DATA);	/* activate input codec */
262 		PCXHR_OUTPB(mgr, PCXHR_XLX_DATA,
265 	PCXHR_INPB(mgr, PCXHR_XLX_RUER);	/* close input level codec */
269 static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level);
271 int hr222_sub_init(struct pcxhr_mgr *mgr)
275 	mgr->board_has_analog = 1;	/* analog always available */
276 	mgr->xlx_cfg = PCXHR_CFG_SYNCDSP_MASK;
278 	reg = PCXHR_INPB(mgr, PCXHR_XLX_STATUS);
280 		mgr->board_has_mic = 1;	/* microphone available */
281 	dev_dbg(&mgr->pci->dev,
282 		"MIC input available = %d\n", mgr->board_has_mic);
285 	PCXHR_OUTPB(mgr, PCXHR_DSP_RESET,
288 	mgr->dsp_reset = PCXHR_DSP_RESET_DSP  |
291 	PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, mgr->dsp_reset);
292 	/* hr222_write_gpo(mgr, 0); does the same */
296 	hr222_config_akm(mgr, AKM_POWER_CONTROL_CMD);
297 	hr222_config_akm(mgr, AKM_CLOCK_INF_55K_CMD);
298 	hr222_config_akm(mgr, AKM_UNMUTE_CMD);
299 	hr222_config_akm(mgr, AKM_RESET_OFF_CMD);
302 	hr222_micro_boost(mgr, 0);
338 int hr222_sub_set_clock(struct pcxhr_mgr *mgr,
346 	switch (mgr->use_clock_type) {
352 		mgr->xlx_cfg &= ~(PCXHR_CFG_CLOCKIN_SEL_MASK |
356 		mgr->xlx_cfg |= PCXHR_CFG_CLOCKIN_SEL_MASK;
357 		mgr->xlx_cfg &= ~PCXHR_CFG_CLOCK_UER1_SEL_MASK;
360 		if (!mgr->board_has_aes1)
363 		mgr->xlx_cfg |= (PCXHR_CFG_CLOCKIN_SEL_MASK |
369 	hr222_config_akm(mgr, AKM_MUTE_CMD);
371 	if (mgr->use_clock_type == HR22_CLOCK_TYPE_INTERNAL) {
372 		PCXHR_OUTPB(mgr, PCXHR_XLX_HIFREQ, pllreg >> 8);
373 		PCXHR_OUTPB(mgr, PCXHR_XLX_LOFREQ, pllreg & 0xff);
377 	PCXHR_OUTPB(mgr, PCXHR_XLX_CFG, mgr->xlx_cfg);
381 	if (mgr->codec_speed != speed) {
382 		mgr->codec_speed = speed;
384 			hr222_config_akm(mgr, AKM_CLOCK_INF_55K_CMD);
386 			hr222_config_akm(mgr, AKM_CLOCK_SUP_55K_CMD);
389 	mgr->sample_rate_real = realfreq;
390 	mgr->cur_clock_type = mgr->use_clock_type;
395 	hr222_config_akm(mgr, AKM_UNMUTE_CMD);
397 	dev_dbg(&mgr->pci->dev, "set_clock to %dHz (realfreq=%d pllreg=%x)\n",
402 int hr222_get_external_clock(struct pcxhr_mgr *mgr,
416 	} else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) {
423 		dev_dbg(&mgr->pci->dev,
429 	if ((PCXHR_INPB(mgr, PCXHR_XLX_CSUER) & mask) != mask) {
430 		dev_dbg(&mgr->pci->dev,
436 	PCXHR_OUTPB(mgr, PCXHR_XLX_STATUS, reg); /* calculate freq */
441 	if (mgr->last_reg_stat != reg) {
443 		mgr->last_reg_stat = reg;
446 	PCXHR_OUTPB(mgr, PCXHR_XLX_STATUS, reg); /* save */
449 	ticks = (unsigned int)PCXHR_INPB(mgr, PCXHR_XLX_CFG);
451 	ticks |= (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP_RESET);
489 	dev_dbg(&mgr->pci->dev, "External clock is at %d Hz (measured %d Hz)\n",
496 int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value)
499 		unsigned char reg = PCXHR_INPB(mgr, PCXHR_XLX_STATUS);
503 		*value = (int)(mgr->dsp_reset & PCXHR_DSP_RESET_GPO_MASK) >>
510 int hr222_write_gpo(struct pcxhr_mgr *mgr, int value)
512 	unsigned char reg = mgr->dsp_reset & ~PCXHR_DSP_RESET_GPO_MASK;
517 	PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, reg);
518 	mgr->dsp_reset = reg;
522 int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable)
525 		mgr->dsp_reset |= PCXHR_DSP_RESET_SMPTE;
527 		mgr->dsp_reset &= ~PCXHR_DSP_RESET_SMPTE;
529 	PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, mgr->dsp_reset);
553 		return hr222_set_hw_capture_level(chip->mgr,
561 		return hr222_set_hw_playback_level(chip->mgr, channel, vol);
577 	chip->mgr->xlx_cfg &= ~(PCXHR_CFG_SRC_MASK |
582 		chip->mgr->xlx_cfg |= PCXHR_CFG_SRC_MASK;
589 		chip->mgr->xlx_cfg |=  PCXHR_CFG_DATAIN_SEL_MASK;
590 		if (chip->mgr->board_has_aes1) {
592 			chip->mgr->xlx_cfg |= PCXHR_CFG_DATA_UER1_SEL_MASK;
618 	PCXHR_OUTPB(chip->mgr, PCXHR_XLX_CFG, chip->mgr->xlx_cfg);
628 	unsigned char mask = chip->mgr->board_has_aes1 ?
632 		PCXHR_OUTPB(chip->mgr, PCXHR_XLX_RUER, idx++); /* idx < 192 */
634 		if (PCXHR_INPB(chip->mgr, PCXHR_XLX_CSUER) & mask)
654 			PCXHR_OUTPB(chip->mgr, PCXHR_XLX_RUER, idx);
656 			PCXHR_OUTPB(chip->mgr, PCXHR_XLX_CSUER, new_bits&0x01 ?
667 static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level)
674 	mgr->xlx_selmic &= ~PCXHR_SELMIC_PREAMPLI_MASK;
675 	mgr->xlx_selmic |= boost_mask;
677 	PCXHR_OUTPB(mgr, PCXHR_XLX_SELMIC, mgr->xlx_selmic);
679 	dev_dbg(&mgr->pci->dev, "hr222_micro_boost : set %x\n", boost_mask);
682 static void hr222_phantom_power(struct pcxhr_mgr *mgr, int power)
685 		mgr->xlx_selmic |= PCXHR_SELMIC_PHANTOM_ALIM;
687 		mgr->xlx_selmic &= ~PCXHR_SELMIC_PHANTOM_ALIM;
689 	PCXHR_OUTPB(mgr, PCXHR_XLX_SELMIC, mgr->xlx_selmic);
691 	dev_dbg(&mgr->pci->dev, "hr222_phantom_power : set %d\n", power);
713 	mutex_lock(&chip->mgr->mixer_mutex);
715 	mutex_unlock(&chip->mgr->mixer_mutex);
724 	mutex_lock(&chip->mgr->mixer_mutex);
730 	mutex_unlock(&chip->mgr->mixer_mutex);
763 	mutex_lock(&chip->mgr->mixer_mutex);
765 	mutex_unlock(&chip->mgr->mixer_mutex);
774 	mutex_lock(&chip->mgr->mixer_mutex);
778 		hr222_micro_boost(chip->mgr, chip->mic_boost);
780 	mutex_unlock(&chip->mgr->mixer_mutex);
803 	mutex_lock(&chip->mgr->mixer_mutex);
805 	mutex_unlock(&chip->mgr->mixer_mutex);
815 	mutex_lock(&chip->mgr->mixer_mutex);
818 		hr222_phantom_power(chip->mgr, power);
822 	mutex_unlock(&chip->mgr->mixer_mutex);
838 	if (!chip->mgr->board_has_mic)