Lines Matching refs:iobase
723 unsigned long iobase;
910 outw(value, chip->iobase + reg);
915 return inw(chip->iobase + reg);
920 outb(value, chip->iobase + reg);
925 return inb(chip->iobase + reg);
1525 x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee;
1536 outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE);
1537 outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE);
1538 outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER);
1539 outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER);
1613 status = inb(chip->iobase + HOST_INT_STATUS);
1626 u8 ctl = inb(chip->iobase + ASSP_CONTROL_B);
1628 ctl = inb(chip->iobase + ASSP_HOST_INT_STATUS);
1630 outb(DSP2HOST_REQ_TIMER, chip->iobase + ASSP_HOST_INT_STATUS);
1649 outb(status, chip->iobase + HOST_INT_STATUS);
1921 int io = chip->iobase;
1962 int io = chip->iobase;
2212 int io = chip->iobase;
2236 unsigned long io = chip->iobase;
2260 unsigned long io = chip->iobase;
2279 outb(RESET_ASSP, chip->iobase + ASSP_CONTROL_B);
2295 t = inb(chip->iobase + ASSP_CONTROL_A);
2299 outb(t, chip->iobase + ASSP_CONTROL_A);
2302 outb(RUN_ASSP, chip->iobase + ASSP_CONTROL_B);
2316 unsigned long io = chip->iobase;
2323 outb(val, chip->iobase + HOST_INT_STATUS);
2351 if (chip->iobase) {
2352 outw(0, chip->iobase + HOST_INT_CTRL); /* disable ints */
2559 chip->iobase = pci_resource_start(pci, 0);
2668 card->shortname, chip->iobase, chip->irq);
2677 chip->iobase + MPU401_DATA_PORT,