Lines Matching refs:reg1
133 .reg1 = WM8776_REG_DACLVOL,
143 .reg1 = WM8776_REG_DACCTRL1,
152 .reg1 = WM8776_REG_DACCTRL1,
159 .reg1 = WM8776_REG_HPLVOL,
170 .reg1 = WM8776_REG_PWRDOWN,
177 .reg1 = WM8776_REG_HPLVOL,
186 .reg1 = WM8776_REG_OUTMUX,
192 .reg1 = WM8776_REG_OUTMUX,
198 .reg1 = WM8776_REG_DACCTRL1,
204 .reg1 = WM8776_REG_PHASESWAP,
213 .reg1 = WM8776_REG_DACCTRL2,
220 .reg1 = WM8776_REG_ADCLVOL,
230 .reg1 = WM8776_REG_ADCMUX,
239 .reg1 = WM8776_REG_ADCMUX,
245 .reg1 = WM8776_REG_ADCMUX,
251 .reg1 = WM8776_REG_ADCMUX,
257 .reg1 = WM8776_REG_ADCMUX,
263 .reg1 = WM8776_REG_ADCMUX,
279 .reg1 = WM8776_REG_ALCCTRL1,
290 .reg1 = WM8776_REG_ALCCTRL3,
301 .reg1 = WM8776_REG_ALCCTRL3,
311 .reg1 = WM8776_REG_LIMITER,
319 .reg1 = WM8776_REG_LIMITER,
329 .reg1 = WM8776_REG_ALCCTRL1,
341 .reg1 = WM8776_REG_ALCCTRL3,
352 .reg1 = WM8776_REG_ALCCTRL3,
360 .reg1 = WM8776_REG_ALCCTRL1,
370 .reg1 = WM8776_REG_LIMITER,
384 .reg1 = WM8776_REG_ALCCTRL2,
391 .reg1 = WM8776_REG_NOISEGATE,
399 .reg1 = WM8776_REG_NOISEGATE,
485 val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1;
523 val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1;
527 wm->ctl[n].reg1 == wm->ctl[n].reg2) {
531 snd_wm8776_write(wm, wm->ctl[n].reg1, val);
534 wm->ctl[n].reg1 != wm->ctl[n].reg2) {