Lines Matching refs:ice

33 	void (*set_register)(struct snd_ice1712 *ice, unsigned int val);
34 unsigned int (*get_register)(struct snd_ice1712 *ice);
263 struct snd_ice1712 *ice = ak->private_data[0];
267 /*dev_dbg(ice->card->dev, "Writing to AK4620: chip=%d, addr=0x%x,
269 orig_dir = ice->gpio.get_dir(ice);
270 ice->gpio.set_dir(ice, orig_dir | GPIO_SPI_ALL);
272 ice->gpio.set_mask(ice, ~GPIO_SPI_ALL);
274 tmp = ice->gpio.get_data(ice);
277 ice->gpio.set_data(ice, tmp);
285 ice->gpio.set_data(ice, tmp);
294 ice->gpio.set_data(ice, tmp);
301 ice->gpio.set_data(ice, tmp);
305 ice->gpio.set_data(ice, tmp);
310 ice->gpio.set_data(ice, tmp);
314 ice->gpio.set_mask(ice, 0xffffff);
316 ice->gpio.set_dir(ice, orig_dir);
394 static void reg_write(struct snd_ice1712 *ice, unsigned int reg,
399 mutex_lock(&ice->gpio_mutex);
403 ice->gpio.set_dir(ice, tmp);
405 ice->gpio.set_mask(ice, ~(tmp));
407 tmp = ice->gpio.get_data(ice);
410 ice->gpio.set_data(ice, tmp);
414 ice->gpio.set_data(ice, tmp);
418 ice->gpio.set_data(ice, tmp);
422 ice->gpio.set_data(ice, tmp);
427 ice->gpio.set_data(ice, tmp);
429 ice->gpio.set_mask(ice, 0xffffff);
431 ice->gpio.set_dir(ice, 0x00ff00);
432 mutex_unlock(&ice->gpio_mutex);
435 static unsigned int get_scr(struct snd_ice1712 *ice)
437 struct qtet_spec *spec = ice->spec;
441 static unsigned int get_mcr(struct snd_ice1712 *ice)
443 struct qtet_spec *spec = ice->spec;
447 static unsigned int get_cpld(struct snd_ice1712 *ice)
449 struct qtet_spec *spec = ice->spec;
453 static void set_scr(struct snd_ice1712 *ice, unsigned int val)
455 struct qtet_spec *spec = ice->spec;
456 reg_write(ice, GPIO_SCR, val);
460 static void set_mcr(struct snd_ice1712 *ice, unsigned int val)
462 struct qtet_spec *spec = ice->spec;
463 reg_write(ice, GPIO_MCR, val);
467 static void set_cpld(struct snd_ice1712 *ice, unsigned int val)
469 struct qtet_spec *spec = ice->spec;
470 reg_write(ice, GPIO_CPLD_CSN, val);
477 struct snd_ice1712 *ice = entry->private_data;
481 get_scr(ice)));
483 get_mcr(ice)));
485 get_cpld(ice)));
488 static void proc_init(struct snd_ice1712 *ice)
490 snd_card_ro_proc_new(ice->card, "quartet", ice, proc_regs_read);
496 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
498 val = get_scr(ice) & SCR_MUTE;
506 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
508 old = get_scr(ice) & SCR_MUTE;
521 struct snd_akm4xxx *ak = ice->akm;
522 set_scr(ice, (get_scr(ice) & ~SCR_MUTE) | new);
542 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
544 val = get_scr(ice) & (SCR_AIN12_SEL1 | SCR_AIN12_SEL0);
567 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
569 old = get_scr(ice);
580 set_scr(ice, new);
583 set_scr(ice, new);
588 set_scr(ice, new);
590 set_scr(ice, new);
595 set_scr(ice, new);
597 set_scr(ice, new);
611 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
614 val = get_scr(ice) & SCR_PHP_V;
622 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
624 old = new = get_scr(ice);
630 set_scr(ice, new);
633 set_scr(ice, new);
639 set_scr(ice, new);
642 set_scr(ice, new);
687 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
689 (private.get_register(ice) & private.bit) ? 1 : 0;
698 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
700 old = private.get_register(ice);
706 private.set_register(ice, new);
769 static int qtet_add_controls(struct snd_ice1712 *ice)
771 struct qtet_spec *spec = ice->spec;
774 err = snd_ice1712_akm4xxx_build_controls(ice);
778 err = snd_ctl_add(ice->card,
779 snd_ctl_new1(&qtet_controls[i], ice));
789 err = snd_ctl_add(ice->card, vmaster);
792 err = snd_ctl_add_followers(ice->card, vmaster, follower_vols);
797 ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
800 static inline int qtet_is_spdif_master(struct snd_ice1712 *ice)
803 return (get_cpld(ice) & CPLD_SYNC_SEL) ? 1 : 0;
806 static unsigned int qtet_get_rate(struct snd_ice1712 *ice)
811 result = get_cpld(ice) & CPLD_CKS_MASK;
828 static void qtet_set_rate(struct snd_ice1712 *ice, unsigned int rate)
833 val = inb(ICEMT1724(ice, RATE));
834 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
836 new = (get_cpld(ice) & ~CPLD_CKS_MASK) | get_cks_val(rate);
839 /* dev_dbg(ice->card->dev, "QT - set_rate: old %x, new %x\n",
840 get_cpld(ice), new); */
841 set_cpld(ice, new);
844 static inline unsigned char qtet_set_mclk(struct snd_ice1712 *ice,
852 static int qtet_set_spdif_clock(struct snd_ice1712 *ice, int type)
856 old = new = get_cpld(ice);
872 set_cpld(ice, new);
879 static int qtet_get_spdif_master_type(struct snd_ice1712 *ice)
883 val = get_cpld(ice);
913 struct snd_ice1712 *ice = ak4113->change_callback_private;
915 if ((qtet_get_spdif_master_type(ice) == EXT_SPDIF_TYPE) &&
919 /* dev_dbg(ice->card->dev, "ak4113 - input rate changed to %d\n",
921 qtet_akm_set_rate_val(ice->akm, rate);
929 static void qtet_spdif_in_open(struct snd_ice1712 *ice,
932 struct qtet_spec *spec = ice->spec;
936 if (qtet_get_spdif_master_type(ice) != EXT_SPDIF_TYPE)
950 static int qtet_init(struct snd_ice1712 *ice)
970 val = inb(ICEMT1724(ice, RATE));
971 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
977 ice->hw_rates = &qtet_rates_info;
978 ice->is_spdif_master = qtet_is_spdif_master;
979 ice->get_rate = qtet_get_rate;
980 ice->set_rate = qtet_set_rate;
981 ice->set_mclk = qtet_set_mclk;
982 ice->set_spdif_clock = qtet_set_spdif_clock;
983 ice->get_spdif_master_type = qtet_get_spdif_master_type;
984 ice->ext_clock_names = ext_clock_names;
985 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
988 ice->spdif.ops.open = ice->pro_open = qtet_spdif_in_open;
989 ice->spec = spec;
994 set_scr(ice, SCR_PHP);
997 set_scr(ice, SCR_PHP | SCR_CODEC_PDN);
1000 set_mcr(ice, 0);
1003 set_cpld(ice, 0);
1006 ice->num_total_dacs = 2;
1007 ice->num_total_adcs = 2;
1009 ice->akm = kcalloc(2, sizeof(struct snd_akm4xxx), GFP_KERNEL);
1010 ak = ice->akm;
1014 ice->akm_codecs = 1;
1015 err = snd_ice1712_akm4xxx_init(ak, &akm_qtet_dac, NULL, ice);
1018 err = snd_ak4113_create(ice->card,
1022 ice, &spec->ak4113);
1027 spec->ak4113->change_callback_private = ice;
1032 proc_init(ice);
1034 qtet_set_rate(ice, 44100);