pci/ice1712/pontis.c

67 static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
70 	return ((unsigned short)ice->akm[0].images[reg] << 8) |
71 		ice->akm[0].images[reg + 1];
77 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
81 	snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
84 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
86 	wm_put_nocache(ice, reg, val);
88 	ice->akm[0].images[reg] = val >> 8;
89 	ice->akm[0].images[reg + 1] = val;
111 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
115 	mutex_lock(&ice->gpio_mutex);
117 		val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
121 	mutex_unlock(&ice->gpio_mutex);
127 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
131 	mutex_lock(&ice->gpio_mutex);
136 		oval = wm_get(ice, idx) & 0xff;
138 			wm_put(ice, idx, nval);
139 			wm_put_nocache(ice, idx, nval | 0x100);
143 	mutex_unlock(&ice->gpio_mutex);
166 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
170 	mutex_lock(&ice->gpio_mutex);
172 		val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
176 	mutex_unlock(&ice->gpio_mutex);
182 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
186 	mutex_lock(&ice->gpio_mutex);
191 		ovol = wm_get(ice, idx) & 0xff;
193 			wm_put(ice, idx, nvol);
197 	mutex_unlock(&ice->gpio_mutex);
208 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
211 	mutex_lock(&ice->gpio_mutex);
212 	ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
213 	mutex_unlock(&ice->gpio_mutex);
219 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
224 	mutex_lock(&ice->gpio_mutex);
225 	nval = oval = wm_get(ice, WM_ADC_MUX);
232 		wm_put(ice, WM_ADC_MUX, nval);
234 	mutex_unlock(&ice->gpio_mutex);
245 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
247 	mutex_lock(&ice->gpio_mutex);
248 	ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
249 	mutex_unlock(&ice->gpio_mutex);
255 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
259 	mutex_lock(&ice->gpio_mutex);
260 	val = oval = wm_get(ice, WM_OUT_MUX);
266 		wm_put(ice, WM_OUT_MUX, val);
269 	mutex_unlock(&ice->gpio_mutex);
280 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
282 	mutex_lock(&ice->gpio_mutex);
283 	ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
284 	mutex_unlock(&ice->gpio_mutex);
290 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
294 	mutex_lock(&ice->gpio_mutex);
295 	oval = wm_get(ice, WM_DAC_CTRL1);
302 		wm_put(ice, WM_DAC_CTRL1, val);
303 		wm_put_nocache(ice, WM_DAC_CTRL1, val);
306 	mutex_unlock(&ice->gpio_mutex);
313 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
315 	unsigned int tmp = snd_ice1712_gpio_read(ice);
320 	snd_ice1712_gpio_write(ice, tmp);
323 static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
327 		set_gpio_bit(ice, PONTIS_CS_CLK, 0);
329 		set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
331 		set_gpio_bit(ice, PONTIS_CS_CLK, 1);
337 static unsigned int spi_read_byte(struct snd_ice1712 *ice)
344 		set_gpio_bit(ice, PONTIS_CS_CLK, 0);
346 		if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
349 		set_gpio_bit(ice, PONTIS_CS_CLK, 1);
356 static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
358 	snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
359 	snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
360 	set_gpio_bit(ice, PONTIS_CS_CS, 0);
361 	spi_send_byte(ice, dev & ~1); /* WRITE */
362 	spi_send_byte(ice, reg); /* MAP */
363 	spi_send_byte(ice, data); /* DATA */
365 	set_gpio_bit(ice, PONTIS_CS_CS, 1);
368 	snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
369 	snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
372 static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
375 	snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
376 	snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
377 	set_gpio_bit(ice, PONTIS_CS_CS, 0);
378 	spi_send_byte(ice, dev & ~1); /* WRITE */
379 	spi_send_byte(ice, reg); /* MAP */
381 	set_gpio_bit(ice, PONTIS_CS_CS, 1);
383 	set_gpio_bit(ice, PONTIS_CS_CS, 0);
384 	spi_send_byte(ice, dev | 1); /* READ */
385 	val = spi_read_byte(ice);
387 	set_gpio_bit(ice, PONTIS_CS_CS, 1);
390 	snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
391 	snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
411 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
413 	mutex_lock(&ice->gpio_mutex);
414 	ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
415 	mutex_unlock(&ice->gpio_mutex);
421 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
425 	mutex_lock(&ice->gpio_mutex);
426 	if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
427 		ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
428 		val = 0x80 | (ice->gpio.saved[0] << 3);
429 		spi_write(ice, CS_DEV, 0x04, val);
432 	mutex_unlock(&ice->gpio_mutex);
451 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
452 	mutex_lock(&ice->gpio_mutex);
454 	ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
455 	mutex_unlock(&ice->gpio_mutex);
461 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
464 	mutex_lock(&ice->gpio_mutex);
467 	changed = val != ice->gpio.write_mask;
468 	ice->gpio.write_mask = val;
469 	mutex_unlock(&ice->gpio_mutex);
475 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
476 	mutex_lock(&ice->gpio_mutex);
478 	ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
479 	mutex_unlock(&ice->gpio_mutex);
485 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
488 	mutex_lock(&ice->gpio_mutex);
491 	changed = (val != ice->gpio.direction);
492 	ice->gpio.direction = val;
493 	mutex_unlock(&ice->gpio_mutex);
499 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
500 	mutex_lock(&ice->gpio_mutex);
501 	snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
502 	snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
503 	ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
504 	mutex_unlock(&ice->gpio_mutex);
510 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
513 	mutex_lock(&ice->gpio_mutex);
514 	snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
515 	snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
516 	val = snd_ice1712_gpio_read(ice) & 0xffff;
519 		snd_ice1712_gpio_write(ice, nval);
522 	mutex_unlock(&ice->gpio_mutex);
620 	struct snd_ice1712 *ice = entry->private_data;
623 	mutex_lock(&ice->gpio_mutex);
628 			wm_put(ice, reg, val);
630 	mutex_unlock(&ice->gpio_mutex);
635 	struct snd_ice1712 *ice = entry->private_data;
638 	mutex_lock(&ice->gpio_mutex);
640 		val = wm_get(ice, reg);
643 	mutex_unlock(&ice->gpio_mutex);
646 static void wm_proc_init(struct snd_ice1712 *ice)
648 	snd_card_rw_proc_new(ice->card, "wm_codec", ice, wm_proc_regs_read,
654 	struct snd_ice1712 *ice = entry->private_data;
657 	mutex_lock(&ice->gpio_mutex);
659 		val = spi_read(ice, CS_DEV, reg);
662 	val = spi_read(ice, CS_DEV, 0x7f);
664 	mutex_unlock(&ice->gpio_mutex);
667 static void cs_proc_init(struct snd_ice1712 *ice)
669 	snd_card_ro_proc_new(ice->card, "cs_codec", ice, cs_proc_regs_read);
673 static int pontis_add_controls(struct snd_ice1712 *ice)
679 		err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
684 	wm_proc_init(ice);
685 	cs_proc_init(ice);
694 static int pontis_init(struct snd_ice1712 *ice)
740 	ice->vt1720 = 1;
741 	ice->num_total_dacs = 2;
742 	ice->num_total_adcs = 2;
745 	ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
746 	if (! ice->akm)
748 	ice->akm_codecs = 1;
753 	ice->gpio.saved[0] = 0;
757 		wm_put(ice, wm_inits[i], wm_inits[i+1]);
760 		wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
764 	outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
767 	outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
770 		spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);