Lines Matching defs:ice

95 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
96 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
107 static inline int is_spdif_master(struct snd_ice1712 *ice)
109 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
112 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
114 return is_spdif_master(ice) || PRO_RATE_LOCKED;
117 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
119 outb((channel << 4) | addr, ICEDS(ice, INDEX));
120 outl(data, ICEDS(ice, DATA));
123 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
125 outb((channel << 4) | addr, ICEDS(ice, INDEX));
126 return inl(ICEDS(ice, DATA));
133 struct snd_ice1712 *ice = ac97->private_data;
138 old_cmd = inb(ICEREG(ice, AC97_CMD));
145 outb(reg, ICEREG(ice, AC97_INDEX));
146 outw(val, ICEREG(ice, AC97_DATA));
148 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
150 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
157 struct snd_ice1712 *ice = ac97->private_data;
162 old_cmd = inb(ICEREG(ice, AC97_CMD));
169 outb(reg, ICEREG(ice, AC97_INDEX));
170 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
172 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
176 return inw(ICEREG(ice, AC97_DATA));
187 struct snd_ice1712 *ice = ac97->private_data;
192 old_cmd = inb(ICEMT(ice, AC97_CMD));
199 outb(reg, ICEMT(ice, AC97_INDEX));
200 outw(val, ICEMT(ice, AC97_DATA));
202 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
204 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
212 struct snd_ice1712 *ice = ac97->private_data;
217 old_cmd = inb(ICEMT(ice, AC97_CMD));
224 outb(reg, ICEMT(ice, AC97_INDEX));
225 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
227 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
231 return inw(ICEMT(ice, AC97_DATA));
241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
243 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
249 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
252 spin_lock_irq(&ice->reg_lock);
253 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
257 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
258 spin_unlock_irq(&ice->reg_lock);
274 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
276 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
277 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
280 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
282 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
285 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
287 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
290 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
292 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
293 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
296 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
298 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
301 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
303 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
304 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
317 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
323 snd_i2c_lock(ice->i2c);
324 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
325 snd_i2c_unlock(ice->i2c);
328 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
329 snd_i2c_unlock(ice->i2c);
339 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
345 snd_i2c_unlock(ice->i2c);
352 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
354 snd_cs8427_iec958_active(ice->cs8427, 1);
357 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
359 snd_cs8427_iec958_active(ice->cs8427, 0);
362 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
364 snd_cs8427_iec958_pcm(ice->cs8427, rate);
370 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
374 err = snd_cs8427_create(ice->i2c, addr,
375 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
377 dev_err(ice->card->dev, "CS8427 initialization failed\n");
380 ice->spdif.ops.open = open_cs8427;
381 ice->spdif.ops.close = close_cs8427;
382 ice->spdif.ops.setup_rate = setup_cs8427;
386 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
389 if (ice->cs8427)
390 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
394 for (i = 0; i < ice->akm_codecs; i++) {
395 if (ice->akm[i].ops.set_rate_val)
396 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
407 struct snd_ice1712 *ice = dev_id;
412 status = inb(ICEREG(ice, IRQSTAT));
417 if (ice->rmidi[0])
418 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
419 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
423 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
425 if (ice->rmidi[1])
426 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
427 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
431 unsigned char mtstat = inb(ICEMT(ice, IRQ));
433 if (ice->playback_pro_substream)
434 snd_pcm_period_elapsed(ice->playback_pro_substream);
435 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
438 if (ice->capture_pro_substream)
439 snd_pcm_period_elapsed(ice->capture_pro_substream);
440 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
444 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
449 pbkstatus = inw(ICEDS(ice, INTSTAT));
450 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
454 substream = ice->playback_con_substream_ds[idx];
457 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
459 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
462 if (ice->capture_con_substream)
463 snd_pcm_period_elapsed(ice->capture_con_substream);
464 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
467 if (ice->playback_con_substream)
468 snd_pcm_period_elapsed(ice->playback_con_substream);
469 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
483 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
487 spin_lock(&ice->reg_lock);
488 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
500 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
501 spin_unlock(&ice->reg_lock);
508 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
512 spin_lock(&ice->reg_lock);
513 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
525 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
526 spin_unlock(&ice->reg_lock);
533 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
537 spin_lock(&ice->reg_lock);
538 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
546 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
547 spin_unlock(&ice->reg_lock);
553 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
567 spin_lock_irq(&ice->reg_lock);
568 outb(0, ice->ddma_port + 15);
569 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
570 outl(runtime->dma_addr, ice->ddma_port + 0);
571 outw(buf_size, ice->ddma_port + 4);
572 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
573 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
574 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
575 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
576 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
577 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
578 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
579 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
580 spin_unlock_irq(&ice->reg_lock);
586 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
599 ice->playback_con_active_buf[substream->number] = 0;
600 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
602 spin_lock_irq(&ice->reg_lock);
603 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
604 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
605 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
606 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
607 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
608 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
609 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
611 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
612 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
614 spin_unlock_irq(&ice->reg_lock);
620 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
632 spin_lock_irq(&ice->reg_lock);
633 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
634 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
635 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
636 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
637 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
638 spin_unlock_irq(&ice->reg_lock);
639 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
645 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
649 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
651 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
660 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
664 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
666 if (ice->playback_con_active_buf[substream->number])
670 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
671 ice->playback_con_virt_addr[substream->number];
680 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
683 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
685 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
751 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
753 ice->playback_con_substream = substream;
761 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
764 ice->playback_con_substream_ds[substream->number] = substream;
766 spin_lock_irq(&ice->reg_lock);
767 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
768 outw(tmp, ICEDS(ice, INTMASK));
769 spin_unlock_irq(&ice->reg_lock);
776 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
778 ice->capture_con_substream = substream;
780 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
788 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
790 ice->playback_con_substream = NULL;
796 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
799 spin_lock_irq(&ice->reg_lock);
800 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
801 outw(tmp, ICEDS(ice, INTMASK));
802 spin_unlock_irq(&ice->reg_lock);
803 ice->playback_con_substream_ds[substream->number] = NULL;
809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
811 ice->capture_con_substream = NULL;
839 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device)
844 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
851 pcm->private_data = ice;
854 ice->pcm = pcm;
857 &ice->pci->dev, 64*1024, 64*1024);
859 dev_warn(ice->card->dev,
865 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device)
870 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
876 pcm->private_data = ice;
879 ice->pcm_ds = pcm;
882 &ice->pci->dev, 64*1024, 128*1024);
903 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
914 spin_lock(&ice->reg_lock);
915 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
920 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
921 spin_unlock(&ice->reg_lock);
932 if (s == ice->playback_pro_substream) {
935 } else if (s == ice->capture_pro_substream) {
940 spin_lock(&ice->reg_lock);
941 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
946 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
947 spin_unlock(&ice->reg_lock);
958 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
985 spin_lock_irqsave(&ice->reg_lock, flags);
986 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
990 spin_unlock_irqrestore(&ice->reg_lock, flags);
993 if (!force && is_pro_rate_locked(ice))
996 old = inb(ICEMT(ice, RATE));
1000 ice->cur_rate = rate;
1001 outb(val, ICEMT(ice, RATE));
1002 spin_unlock_irqrestore(&ice->reg_lock, flags);
1004 if (ice->gpio.set_pro_rate)
1005 ice->gpio.set_pro_rate(ice, rate);
1006 for (i = 0; i < ice->akm_codecs; i++) {
1007 if (ice->akm[i].ops.set_rate_val)
1008 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1010 if (ice->spdif.ops.setup_rate)
1011 ice->spdif.ops.setup_rate(ice, rate);
1016 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1018 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1019 spin_lock_irq(&ice->reg_lock);
1020 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1021 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1022 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1023 spin_unlock_irq(&ice->reg_lock);
1031 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1033 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1039 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1041 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1042 spin_lock_irq(&ice->reg_lock);
1043 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1044 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1045 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1046 spin_unlock_irq(&ice->reg_lock);
1053 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1055 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1061 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1064 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1066 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1075 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1078 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1080 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1128 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1130 ice->playback_pro_substream = substream;
1135 if (is_pro_rate_locked(ice)) {
1140 if (ice->spdif.ops.open)
1141 ice->spdif.ops.open(ice, substream);
1148 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1151 ice->capture_pro_substream = substream;
1156 if (is_pro_rate_locked(ice)) {
1166 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1169 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1170 ice->playback_pro_substream = NULL;
1171 if (ice->spdif.ops.close)
1172 ice->spdif.ops.close(ice, substream);
1179 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1182 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1183 ice->capture_pro_substream = NULL;
1205 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device)
1210 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1217 pcm->private_data = ice;
1222 &ice->pci->dev, 256*1024, 256*1024);
1224 ice->pcm_pro = pcm;
1226 if (ice->cs8427) {
1228 err = snd_cs8427_iec958_build(ice->cs8427,
1235 return snd_ice1712_build_pro_mixer(ice);
1242 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1244 unsigned int vol = ice->pro_volumes[index];
1249 outb(index, ICEMT(ice, MONITOR_INDEX));
1250 outw(val, ICEMT(ice, MONITOR_VOLUME));
1257 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1261 spin_lock_irq(&ice->reg_lock);
1263 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1265 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1266 spin_unlock_irq(&ice->reg_lock);
1272 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1279 spin_lock_irq(&ice->reg_lock);
1280 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1281 change = nval != ice->pro_volumes[priv_idx];
1282 ice->pro_volumes[priv_idx] = nval;
1283 snd_ice1712_update_volume(ice, priv_idx);
1284 spin_unlock_irq(&ice->reg_lock);
1299 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1303 spin_lock_irq(&ice->reg_lock);
1305 (ice->pro_volumes[priv_idx] >> 0) & 127;
1307 (ice->pro_volumes[priv_idx] >> 16) & 127;
1308 spin_unlock_irq(&ice->reg_lock);
1314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1321 spin_lock_irq(&ice->reg_lock);
1322 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1323 change = nval != ice->pro_volumes[priv_idx];
1324 ice->pro_volumes[priv_idx] = nval;
1325 snd_ice1712_update_volume(ice, priv_idx);
1326 spin_unlock_irq(&ice->reg_lock);
1397 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1399 struct snd_card *card = ice->card;
1405 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1410 if (ice->num_total_adcs > 0) {
1412 tmp.count = ice->num_total_adcs;
1413 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1418 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1422 if (ice->num_total_adcs > 0) {
1424 tmp.count = ice->num_total_adcs;
1425 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1430 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1436 ice->pro_volumes[idx] = 0x80008000; /* mute */
1437 snd_ice1712_update_volume(ice, idx);
1439 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1440 ice->pro_volumes[idx] = 0x80008000; /* mute */
1441 snd_ice1712_update_volume(ice, idx);
1444 ice->pro_volumes[idx] = 0x80008000; /* mute */
1445 snd_ice1712_update_volume(ice, idx);
1452 struct snd_ice1712 *ice = ac97->private_data;
1453 ice->ac97 = NULL;
1456 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1470 if (ice_has_con_ac97(ice)) {
1471 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1475 ac97.private_data = ice;
1477 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1479 dev_warn(ice->card->dev,
1482 return snd_ctl_add(ice->card,
1484 ice));
1488 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1489 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1493 ac97.private_data = ice;
1495 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1497 dev_warn(ice->card->dev,
1503 strcat(ice->card->mixername, "ICE1712 - multitrack");
1511 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1513 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1519 struct snd_ice1712 *ice = entry->private_data;
1522 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1525 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1526 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1527 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1528 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1529 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1530 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1531 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1532 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1533 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1534 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1535 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1536 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1537 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1538 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1540 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1542 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1543 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1544 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1547 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1548 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1549 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1550 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1551 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1552 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1553 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1556 static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1558 snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read);
1576 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1578 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1603 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1604 if (ice->spdif.ops.default_get)
1605 ice->spdif.ops.default_get(ice, ucontrol);
1612 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1613 if (ice->spdif.ops.default_put)
1614 return ice->spdif.ops.default_put(ice, ucontrol);
1630 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1631 if (ice->spdif.ops.default_get) {
1652 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1653 if (ice->spdif.ops.default_get) {
1690 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1691 if (ice->spdif.ops.stream_get)
1692 ice->spdif.ops.stream_get(ice, ucontrol);
1699 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1700 if (ice->spdif.ops.stream_put)
1701 return ice->spdif.ops.stream_put(ice, ucontrol);
1719 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1723 snd_ice1712_save_gpio_status(ice);
1725 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1726 snd_ice1712_restore_gpio_status(ice);
1733 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1741 snd_ice1712_save_gpio_status(ice);
1742 val = snd_ice1712_gpio_read(ice);
1745 snd_ice1712_gpio_write(ice, nval);
1746 snd_ice1712_restore_gpio_status(ice);
1778 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1784 spin_lock_irq(&ice->reg_lock);
1785 if (is_spdif_master(ice)) {
1788 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1795 spin_unlock_irq(&ice->reg_lock);
1802 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1810 spin_lock_irq(&ice->reg_lock);
1811 oval = inb(ICEMT(ice, RATE));
1813 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1816 spin_unlock_irq(&ice->reg_lock);
1817 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1818 spin_lock_irq(&ice->reg_lock);
1820 change = inb(ICEMT(ice, RATE)) != oval;
1821 spin_unlock_irq(&ice->reg_lock);
1824 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1825 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1915 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1919 spin_lock_irq(&ice->reg_lock);
1922 spin_unlock_irq(&ice->reg_lock);
1946 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1950 spin_lock_irq(&ice->reg_lock);
1953 spin_unlock_irq(&ice->reg_lock);
1985 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1989 spin_lock_irq(&ice->reg_lock);
1990 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
1991 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
1992 spin_unlock_irq(&ice->reg_lock);
2011 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2026 spin_lock_irq(&ice->reg_lock);
2027 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2032 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2033 spin_unlock_irq(&ice->reg_lock);
2038 spin_lock_irq(&ice->reg_lock);
2039 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2052 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2054 spin_unlock_irq(&ice->reg_lock);
2061 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2064 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2081 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2087 spin_lock_irq(&ice->reg_lock);
2088 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2112 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2113 spin_unlock_irq(&ice->reg_lock);
2148 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2150 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2157 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2160 spin_lock_irq(&ice->reg_lock);
2161 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2162 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2163 spin_unlock_irq(&ice->reg_lock);
2188 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2191 spin_lock_irq(&ice->reg_lock);
2193 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2194 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2196 spin_unlock_irq(&ice->reg_lock);
2222 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2228 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2229 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2230 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2231 return inb(ICEREG(ice, I2C_DATA));
2234 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2242 ice->eeprom.subvendor = 0;
2243 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2244 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2245 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2246 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2247 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2248 if (ice->eeprom.subvendor == 0 ||
2249 ice->eeprom.subvendor == (unsigned int)-1) {
2252 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2253 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2254 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2255 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2256 dev_err(ice->card->dev,
2265 dev_info(ice->card->dev,
2267 ice->eeprom.subvendor = c->subvendor;
2268 } else if (c->subvendor != ice->eeprom.subvendor)
2273 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2274 ice->eeprom.version = 1;
2275 ice->eeprom.size = c->eeprom_size + 6;
2276 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2280 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2281 ice->eeprom.subvendor);
2284 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2285 if (ice->eeprom.size < 6)
2286 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2287 else if (ice->eeprom.size > 32) {
2288 dev_err(ice->card->dev,
2289 "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2292 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2293 if (ice->eeprom.version != 1) {
2294 dev_err(ice->card->dev, "invalid EEPROM version %i\n",
2295 ice->eeprom.version);
2298 size = ice->eeprom.size - 6;
2300 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2303 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2304 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2305 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2312 static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2314 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2316 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2318 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2319 !ice->dxr_enable)
2324 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2325 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2326 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2327 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2328 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2329 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24 &&
2330 ice->eeprom.subvendor != ICE1712_SUBDEVICE_STAUDIO_ADCIII) {
2331 ice->gpio.write_mask = ice->eeprom.gpiomask;
2332 ice->gpio.direction = ice->eeprom.gpiodir;
2333 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2334 ice->eeprom.gpiomask);
2335 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2336 ice->eeprom.gpiodir);
2337 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2338 ice->eeprom.gpiostate);
2340 ice->gpio.write_mask = 0xc0;
2341 ice->gpio.direction = 0xff;
2342 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2343 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2344 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2347 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2348 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2349 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2351 outb(0, ICEREG(ice, AC97_CMD));
2353 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2355 snd_ice1712_set_pro_rate(ice, 48000, 1);
2357 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2359 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2361 ICEREG(ice, IRQMASK));
2362 outb(0x00, ICEMT(ice, IRQ));
2367 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2372 if (snd_BUG_ON(!ice->pcm_pro))
2374 kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice);
2375 kctl->id.device = ice->pcm_pro->device;
2376 err = snd_ctl_add(ice->card, kctl);
2379 kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice);
2380 kctl->id.device = ice->pcm_pro->device;
2381 err = snd_ctl_add(ice->card, kctl);
2384 kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice);
2385 kctl->id.device = ice->pcm_pro->device;
2386 err = snd_ctl_add(ice->card, kctl);
2389 kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice);
2390 kctl->id.device = ice->pcm_pro->device;
2391 err = snd_ctl_add(ice->card, kctl);
2394 ice->spdif.stream_ctl = kctl;
2399 static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2403 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2406 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2409 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2413 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2416 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2420 if (ice->num_total_dacs > 0) {
2422 tmp.count = ice->num_total_dacs;
2423 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2428 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2432 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2435 return snd_ctl_add(ice->card,
2436 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2441 struct snd_ice1712 *ice = card->private_data;
2443 if (ice->card_info && ice->card_info->chip_exit)
2444 ice->card_info->chip_exit(ice);
2447 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
2448 outb(0xff, ICEREG(ice, IRQMASK));
2450 snd_ice1712_akm4xxx_free(ice);
2460 struct snd_ice1712 *ice = card->private_data;
2474 ice->omni = omni ? 1 : 0;
2479 ice->cs8427_timeout = cs8427_timeout;
2480 ice->dxr_enable = dxr_enable;
2481 spin_lock_init(&ice->reg_lock);
2482 mutex_init(&ice->gpio_mutex);
2483 mutex_init(&ice->i2c_mutex);
2484 mutex_init(&ice->open_mutex);
2485 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2486 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2487 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2488 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2489 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2490 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2492 ice->spdif.cs8403_bits =
2493 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2496 ice->card = card;
2497 ice->pci = pci;
2498 ice->irq = -1;
2501 pci_write_config_word(ice->pci, 0x40, 0x807f);
2502 pci_write_config_word(ice->pci, 0x42, 0x0006);
2503 snd_ice1712_proc_init(ice);
2508 ice->port = pci_resource_start(pci, 0);
2509 ice->ddma_port = pci_resource_start(pci, 1);
2510 ice->dmapath_port = pci_resource_start(pci, 2);
2511 ice->profi_port = pci_resource_start(pci, 3);
2514 IRQF_SHARED, KBUILD_MODNAME, ice)) {
2519 ice->irq = pci->irq;
2520 card->sync_irq = ice->irq;
2523 if (snd_ice1712_read_eeprom(ice, modelname) < 0)
2525 if (snd_ice1712_chip_init(ice) < 0)
2545 struct snd_ice1712 *ice;
2557 sizeof(*ice), &card);
2560 ice = card->private_data;
2572 if (c->subvendor == ice->eeprom.subvendor) {
2577 err = c->chip_init(ice);
2581 ice->card_info = c;
2589 err = snd_ice1712_pcm_profi(ice, pcm_dev++);
2593 if (ice_has_con_ac97(ice)) {
2594 err = snd_ice1712_pcm(ice, pcm_dev++);
2599 err = snd_ice1712_ac97_mixer(ice);
2603 err = snd_ice1712_build_controls(ice);
2608 err = c->build_controls(ice);
2613 if (ice_has_con_ac97(ice)) {
2614 err = snd_ice1712_pcm_ds(ice, pcm_dev++);
2621 ICEREG(ice, MPU1_CTRL),
2624 -1, &ice->rmidi[0]);
2629 snprintf(ice->rmidi[0]->name,
2630 sizeof(ice->rmidi[0]->name),
2633 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2636 ICEREG(ice, MPU2_CTRL),
2639 -1, &ice->rmidi[1]);
2645 snprintf(ice->rmidi[1]->name,
2646 sizeof(ice->rmidi[1]->name),
2652 snd_ice1712_set_input_clock_source(ice, 0);
2655 card->shortname, ice->port, ice->irq);
2669 struct snd_ice1712 *ice = card->private_data;
2671 if (!ice->pm_suspend_enabled)
2676 snd_ac97_suspend(ice->ac97);
2678 spin_lock_irq(&ice->reg_lock);
2679 ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2680 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2681 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2682 spin_unlock_irq(&ice->reg_lock);
2684 if (ice->pm_suspend)
2685 ice->pm_suspend(ice);
2692 struct snd_ice1712 *ice = card->private_data;
2695 if (!ice->pm_suspend_enabled)
2698 if (ice->cur_rate)
2699 rate = ice->cur_rate;
2703 if (snd_ice1712_chip_init(ice) < 0) {
2708 ice->cur_rate = rate;
2710 if (ice->pm_resume)
2711 ice->pm_resume(ice);
2713 if (ice->pm_saved_is_spdif_master) {
2715 spin_lock_irq(&ice->reg_lock);
2716 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2717 ICEMT(ice, RATE));
2718 spin_unlock_irq(&ice->reg_lock);
2719 snd_ice1712_set_input_clock_source(ice, 1);
2722 snd_ice1712_set_pro_rate(ice, rate, 1);
2723 snd_ice1712_set_input_clock_source(ice, 0);
2726 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2727 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2729 snd_ac97_resume(ice->ac97);