pci/hda/patch_cs8409.c

488 	struct sub_codec *cs42l42 = spec->scodecs[get_amp_index(kctrl)];
496 			*valp++ = cs42l42->vol[ofs];
498 			*valp = cs42l42->vol[ofs+1];
502 			*valp = cs42l42->vol[ofs];
511 static void cs42l42_mute(struct sub_codec *cs42l42, int vol_type,
517 				cs8409_i2c_write(cs42l42, CS42L42_MIXER_CHA_VOL, 0x3f);
519 				cs8409_i2c_write(cs42l42, CS42L42_MIXER_CHB_VOL, 0x3f);
522 				cs8409_i2c_write(cs42l42, CS42L42_ADC_VOLUME, 0x9f);
527 				cs8409_i2c_write(cs42l42, CS42L42_MIXER_CHA_VOL,
528 					-(cs42l42->vol[CS42L42_DAC_CH0_VOL_OFFSET])
531 				cs8409_i2c_write(cs42l42, CS42L42_MIXER_CHB_VOL,
532 					-(cs42l42->vol[CS42L42_DAC_CH1_VOL_OFFSET])
536 				cs8409_i2c_write(cs42l42, CS42L42_ADC_VOLUME,
537 					cs42l42->vol[CS42L42_ADC_VOL_OFFSET]
547 	struct sub_codec *cs42l42 = spec->scodecs[get_amp_index(kctrl)];
555 			cs42l42->vol[ofs] = *valp;
558 			cs42l42->vol[ofs + 1] = *valp;
561 			cs42l42_mute(cs42l42, CS42L42_VOL_DAC, chs, false);
565 			cs42l42->vol[ofs] = *valp;
567 			cs42l42_mute(cs42l42, CS42L42_VOL_ADC, chs, false);
582 	struct sub_codec *cs42l42;
600 		cs42l42 = spec->scodecs[i];
601 		cs42l42_mute(cs42l42, CS42L42_VOL_DAC, 0x3, mute);
611 	struct sub_codec *cs42l42;
629 		cs42l42 = spec->scodecs[i];
630 		cs42l42_mute(cs42l42, CS42L42_VOL_ADC, 0x3, mute);
635 static void cs42l42_enable_jack_detect(struct sub_codec *cs42l42)
637 	cs8409_i2c_write(cs42l42, CS42L42_HSBIAS_SC_AUTOCTL, cs42l42->hsbias_hiz);
639 	cs8409_i2c_write(cs42l42, CS42L42_WAKE_CTL, 0x00C1);
643 	cs8409_i2c_write(cs42l42, CS42L42_WAKE_CTL, 0x00C0);
645 	cs8409_i2c_read(cs42l42, CS42L42_TSRS_PLUG_STATUS);
647 	cs8409_i2c_write(cs42l42, CS42L42_TSRS_PLUG_INT_MASK, 0xF3);
651 static void cs42l42_run_jack_detect(struct sub_codec *cs42l42)
654 	cs8409_i2c_read(cs42l42, CS42L42_CODEC_STATUS);
655 	cs8409_i2c_read(cs42l42, CS42L42_DET_STATUS1);
656 	cs8409_i2c_write(cs42l42, CS42L42_TSRS_PLUG_INT_MASK, 0xFF);
657 	cs8409_i2c_read(cs42l42, CS42L42_TSRS_PLUG_STATUS);
659 	cs8409_i2c_write(cs42l42, CS42L42_PWR_CTL2, 0x87);
660 	cs8409_i2c_write(cs42l42, CS42L42_DAC_CTL2, 0x86);
661 	cs8409_i2c_write(cs42l42, CS42L42_MISC_DET_CTL, 0x07);
662 	cs8409_i2c_write(cs42l42, CS42L42_CODEC_INT_MASK, 0xFD);
663 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL2, 0x80);
666 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL1, 0x77);
667 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL2, 0xc0);
670 static int cs42l42_manual_hs_det(struct sub_codec *cs42l42)
679 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL2,
686 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL1,
691 	cs8409_i2c_write(cs42l42, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP1);
695 	hs_det_status = cs8409_i2c_read(cs42l42, CS42L42_HS_DET_STATUS);
703 	cs8409_i2c_write(cs42l42, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP2);
707 	hs_det_status = cs8409_i2c_read(cs42l42, CS42L42_HS_DET_STATUS);
747 	cs8409_i2c_write(cs42l42, CS42L42_HS_SWITCH_CTL, hs_det_sw);
750 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL2,
757 	cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL1,
764 static int cs42l42_handle_tip_sense(struct sub_codec *cs42l42, unsigned int reg_ts_status)
771 		if (cs42l42->no_type_dect) {
773 			cs42l42->hp_jack_in = 1;
774 			cs42l42->mic_jack_in = 0;
776 			cs42l42_run_jack_detect(cs42l42);
782 		cs42l42->hp_jack_in = 0;
783 		cs42l42->mic_jack_in = 0;
790 	codec_dbg(cs42l42->codec, "Tip Sense Detection: (%d)\n", reg_ts_status);
795 static int cs42l42_jack_unsol_event(struct sub_codec *cs42l42)
805 	reg_cdc_status = cs8409_i2c_read(cs42l42, CS42L42_CODEC_STATUS);
806 	reg_hs_status = cs8409_i2c_read(cs42l42, CS42L42_HS_DET_STATUS);
807 	reg_ts_status = cs8409_i2c_read(cs42l42, CS42L42_TSRS_PLUG_STATUS);
820 		cs8409_i2c_write(cs42l42, CS42L42_CODEC_INT_MASK, 0xFF);
825 		cs8409_i2c_write(cs42l42, CS42L42_HSDET_CTL2, 0x80);
827 		if (cs42l42->no_type_dect) {
828 			status_changed = cs42l42_handle_tip_sense(cs42l42, current_plug_status);
831 				codec_dbg(cs42l42->codec,
834 				type = cs42l42_manual_hs_det(cs42l42);
841 				cs42l42->hp_jack_in = 1;
842 				cs42l42->mic_jack_in = 1;
846 				cs42l42->hp_jack_in = 1;
847 				cs42l42->mic_jack_in = 0;
851 				cs42l42->hp_jack_in = 0;
852 				cs42l42->mic_jack_in = 0;
855 			codec_dbg(cs42l42->codec, "Detection done (%d)\n", type);
859 		cs8409_i2c_write(cs42l42, CS42L42_DAC_CTL2, 0x02);
861 		cs8409_i2c_write(cs42l42, CS42L42_TSRS_PLUG_INT_MASK, 0xF3);
863 		status_changed = cs42l42_handle_tip_sense(cs42l42, current_plug_status);
869 static void cs42l42_resume(struct sub_codec *cs42l42)
871 	struct hda_codec *codec = cs42l42->codec;
883 	spec->gpio_data |= cs42l42->reset_gpio;
887 	cs42l42->suspended = 0;
890 	cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
894 	cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));
896 	fsv_old = cs8409_i2c_read(cs42l42, CS42L42_HP_CTL);
897 	if (cs42l42->full_scale_vol == CS42L42_FULL_SCALE_VOL_0DB)
902 		cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv_new);
907 	snd_hda_codec_allow_unsol_events(cs42l42->codec);
909 	cs42l42_enable_jack_detect(cs42l42);
912 static void cs42l42_suspend(struct sub_codec *cs42l42)
914 	struct hda_codec *codec = cs42l42->codec;
931 	cs8409_i2c_bulk_write(cs42l42, cs42l42_pwr_down_seq, ARRAY_SIZE(cs42l42_pwr_down_seq));
935 			true, cs42l42, CS42L42_CODEC_STATUS) < 0)
939 	cs8409_i2c_write(cs42l42, CS42L42_PWR_CTL2, 0x9C);
940 	cs42l42->suspended = 1;
941 	cs42l42->last_page = 0;
942 	cs42l42->hp_jack_in = 0;
943 	cs42l42->mic_jack_in = 0;
947 	spec->gpio_data &= ~cs42l42->reset_gpio;
977 	struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0];
985 	if (res & cs42l42->irq_mask)
988 	if (cs42l42_jack_unsol_event(cs42l42)) {
990 				    cs42l42->hp_jack_in ? 0 : PIN_OUT);
1034 	struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0];
1067 	cs42l42_resume(cs42l42);
1087 	struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0];
1100 			*res = (cs42l42->hp_jack_in) ? AC_PINSENSE_PRESENCE : 0;
1106 			*res = (cs42l42->mic_jack_in) ? AC_PINSENSE_PRESENCE : 0;
1240 	struct sub_codec *cs42l42;
1243 	cs42l42 = spec->scodecs[CS8409_CODEC0];
1244 	if (!cs42l42->suspended && (~res & cs42l42->irq_mask) &&
1245 	    cs42l42_jack_unsol_event(cs42l42)) {
1259 	cs42l42 = spec->scodecs[CS8409_CODEC1];
1260 	if (!cs42l42->suspended && (~res & cs42l42->irq_mask) &&
1261 	    cs42l42_jack_unsol_event(cs42l42)) {
1277 	struct sub_codec *cs42l42;
1293 		cs42l42 = spec->scodecs[i];
1294 		cs42l42_resume(cs42l42);
1315 	struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0];
1329 			cs42l42 = spec->scodecs[CS8409_CODEC1];
1331 			*res = (cs42l42->hp_jack_in) ? AC_PINSENSE_PRESENCE : 0;
1337 			*res = (cs42l42->mic_jack_in) ? AC_PINSENSE_PRESENCE : 0;