pci/hda/hda_tegra.c

100 static void hda_tegra_init(struct hda_tegra *hda)
105 	v = readl(hda->regs + HDA_IPFS_CONFIG);
107 	writel(v, hda->regs + HDA_IPFS_CONFIG);
110 	v = readl(hda->regs + HDA_CFG_CMD);
114 	writel(v, hda->regs + HDA_CFG_CMD);
116 	writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
117 	writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
118 	writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
120 	v = readl(hda->regs + HDA_IPFS_INTR_MASK);
122 	writel(v, hda->regs + HDA_IPFS_INTR_MASK);
158 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
168 	clk_bulk_disable_unprepare(hda->nclocks, hda->clocks);
177 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
181 		rc = reset_control_bulk_assert(hda->nresets, hda->resets);
186 	rc = clk_bulk_prepare_enable(hda->nclocks, hda->clocks);
190 		hda_tegra_init(hda);
198 		rc = reset_control_bulk_deassert(hda->nresets, hda->resets);
227 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
229 	cancel_work_sync(&hda->probe_work);
244 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
248 	hda->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
249 	if (IS_ERR(hda->regs))
250 		return PTR_ERR(hda->regs);
252 	bus->remap_addr = hda->regs + HDA_BAR0;
255 	hda_tegra_init(hda);
262 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
268 	const char *sname, *drv_name = "tegra-hda";
299 	if (of_device_is_compatible(np, "nvidia,tegra194-hda")) {
305 		val = readl(hda->regs + FPCI_DBG_CFG_2) & ~FPCI_GCAP_NSDO_MASK;
307 		writel(val, hda->regs + FPCI_DBG_CFG_2);
328 	if (of_device_is_compatible(np, "nvidia,tegra234-hda"))
372 	if (of_device_is_compatible(np, "nvidia,tegra30-hda"))
407 			    struct hda_tegra *hda)
416 	chip = &hda->chip;
432 	INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
468 	{ .compatible = "nvidia,tegra30-hda", .data = &tegra30_data },
469 	{ .compatible = "nvidia,tegra194-hda", .data = &tegra194_data },
470 	{ .compatible = "nvidia,tegra234-hda", .data = &tegra234_data },
482 	struct hda_tegra *hda;
485 	hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
486 	if (!hda)
488 	hda->dev = &pdev->dev;
489 	chip = &hda->chip;
491 	hda->soc = of_device_get_match_data(&pdev->dev);
500 	hda->resets[hda->nresets++].id = "hda";
506 	if (hda->soc->has_hda2hdmi)
507 		hda->resets[hda->nresets++].id = "hda2hdmi";
514 	if (hda->soc->has_hda2codec_2x_reset)
515 		hda->resets[hda->nresets++].id = "hda2codec_2x";
517 	err = devm_reset_control_bulk_get_exclusive(&pdev->dev, hda->nresets,
518 						    hda->resets);
522 	hda->clocks[hda->nclocks++].id = "hda";
523 	if (hda->soc->has_hda2hdmi)
524 		hda->clocks[hda->nclocks++].id = "hda2hdmi";
525 	hda->clocks[hda->nclocks++].id = "hda2codec_2x";
527 	err = devm_clk_bulk_get(&pdev->dev, hda->nclocks, hda->clocks);
531 	err = hda_tegra_create(card, driver_flags, hda);
538 	pm_runtime_enable(hda->dev);
540 		pm_runtime_forbid(hda->dev);
542 	schedule_work(&hda->probe_work);
553 	struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
554 	struct azx *chip = &hda->chip;
555 	struct platform_device *pdev = to_platform_device(hda->dev);
558 	pm_runtime_get_sync(hda->dev);
580 	pm_runtime_put(hda->dev);
604 		.name = "tegra-hda",