Lines Matching defs:SRC
60 #define SRC regs[insn->src_reg]
1764 DST = DST OP (SRC & 63); \
1767 DST = (u32) DST OP ((u32) SRC & 31); \
1778 DST = DST OP SRC; \
1781 DST = (u32) DST OP (u32) SRC; \
1808 DST = (u32) SRC;
1811 DST = (u32)(s8) SRC;
1814 DST = (u32)(s16) SRC;
1824 DST = SRC;
1827 DST = (s8) SRC;
1830 DST = (s16) SRC;
1833 DST = (s32) SRC;
1845 DST = (u64) (u32) (((s32) DST) >> (SRC & 31));
1851 (*(s64 *) &DST) >>= (SRC & 63);
1859 div64_u64_rem(DST, SRC, &AX);
1863 AX = div64_s64(DST, SRC);
1864 DST = DST - AX * SRC;
1872 DST = do_div(AX, (u32) SRC);
1876 AX = do_div(AX, abs((s32)SRC));
1915 DST = div64_u64(DST, SRC);
1918 DST = div64_s64(DST, SRC);
1926 do_div(AX, (u32) SRC);
1931 do_div(AX, abs((s32)SRC));
1932 if (((s32)DST < 0) == ((s32)SRC < 0))
2062 if ((SIGN##64) DST CMP_OP (SIGN##64) SRC) { \
2068 if ((SIGN##32) DST CMP_OP (SIGN##32) SRC) { \
2112 *(SIZE *)(unsigned long) (DST + insn->off) = SRC; \
2118 DST = *(SIZE *)(unsigned long) (SRC + insn->off); \
2122 (const void *)(long) (SRC + insn->off)); \
2134 DST = *(SIZE *)(unsigned long) (SRC + insn->off); \
2138 (const void *)(long) (SRC + insn->off)); \
2150 atomic_##KOP((u32) SRC, (atomic_t *)(unsigned long) \
2153 atomic64_##KOP((u64) SRC, (atomic64_t *)(unsigned long) \
2158 SRC = (u32) atomic_fetch_##KOP( \
2159 (u32) SRC, \
2162 SRC = (u64) atomic64_fetch_##KOP( \
2163 (u64) SRC, \
2178 SRC = (u32) atomic_xchg(
2180 (u32) SRC);
2182 SRC = (u64) atomic64_xchg(
2184 (u64) SRC);
2190 (u32) BPF_R0, (u32) SRC);
2194 (u64) BPF_R0, (u64) SRC);