Lines Matching refs:port

96 /* The next two interrupts are for the midi port on the Audigy Drive (A_MPU1)			*/
133 #define INTE_VIRTUALSB_MASK 0xc0000000 /* Virtual Soundblaster I/O port capture */
138 #define INTE_VIRTUALMPU_MASK 0x30000000 /* Virtual MPU I/O port capture */
160 /* The next two interrupts are for the midi port on the Audigy Drive (A_MPU1) */
271 // On Audigy, the MPU port moved to the 0x70-0x74 ptr registers
289 // The GPIO port is used for I/O config on Sound Blasters;
291 // On E-MU cards the port is used as the interface to the FPGA.
368 #define JOYSTICK1 0x00 /* Analog joystick port register */
369 #define JOYSTICK2 0x01 /* Analog joystick port register */
370 #define JOYSTICK3 0x02 /* Analog joystick port register */
371 #define JOYSTICK4 0x03 /* Analog joystick port register */
372 #define JOYSTICK5 0x04 /* Analog joystick port register */
373 #define JOYSTICK6 0x05 /* Analog joystick port register */
374 #define JOYSTICK7 0x06 /* Analog joystick port register */
375 #define JOYSTICK8 0x07 /* Analog joystick port register */
854 /* This is the MPU port on the card (via the game port) */
859 /* This is the MPU port on the Audigy Drive */
958 // - The FPGA is controlled via Audigy's GPIO port, while sample data is
1088 #define EMU_HANA_MIDI_OUT 0x12 /* 00xxxxx 5 bit Source for each MIDI out port */
1628 int port;
1702 unsigned long port; /* I/O port number */
1755 spinlock_t spi_lock; /* serialises access to spi port */
1756 spinlock_t i2c_lock; /* serialises access to i2c port */
1872 static inline unsigned int snd_emu10k1_wc(struct snd_emu10k1 *emu) { return (inl(emu->port + WC) >> 6) & 0xfffff; }