include/linux/rtsx_pci.h

92 #define rtsx_pci_writel(pcr, reg, value) \
93 	iowrite32(value, (pcr)->remap_addr + reg)
94 #define rtsx_pci_readl(pcr, reg) \
95 	ioread32((pcr)->remap_addr + reg)
96 #define rtsx_pci_writew(pcr, reg, value) \
97 	iowrite16(value, (pcr)->remap_addr + reg)
98 #define rtsx_pci_readw(pcr, reg) \
99 	ioread16((pcr)->remap_addr + reg)
100 #define rtsx_pci_writeb(pcr, reg, value) \
101 	iowrite8(value, (pcr)->remap_addr + reg)
102 #define rtsx_pci_readb(pcr, reg) \
103 	ioread8((pcr)->remap_addr + reg)
1080 #define rtsx_pci_init_cmd(pcr)		((pcr)->ci = 0)
1088 	struct rtsx_pcr			*pcr;
1092 	int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val);
1093 	int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val);
1094 	int		(*extra_init_hw)(struct rtsx_pcr *pcr);
1095 	int		(*optimize_phy)(struct rtsx_pcr *pcr);
1096 	int		(*turn_on_led)(struct rtsx_pcr *pcr);
1097 	int		(*turn_off_led)(struct rtsx_pcr *pcr);
1098 	int		(*enable_auto_blink)(struct rtsx_pcr *pcr);
1099 	int		(*disable_auto_blink)(struct rtsx_pcr *pcr);
1100 	int		(*card_power_on)(struct rtsx_pcr *pcr, int card);
1101 	int		(*card_power_off)(struct rtsx_pcr *pcr, int card);
1102 	int		(*switch_output_voltage)(struct rtsx_pcr *pcr,
1104 	unsigned int	(*cd_deglitch)(struct rtsx_pcr *pcr);
1106 	void		(*fetch_vendor_settings)(struct rtsx_pcr *pcr);
1107 	void		(*force_power_down)(struct rtsx_pcr *pcr, u8 pm_state, bool runtime);
1108 	void		(*stop_cmd)(struct rtsx_pcr *pcr);
1110 	void (*set_aspm)(struct rtsx_pcr *pcr, bool enable);
1111 	void (*set_l1off_cfg_sub_d0)(struct rtsx_pcr *pcr, int active);
1112 	void (*enable_ocp)(struct rtsx_pcr *pcr);
1113 	void (*disable_ocp)(struct rtsx_pcr *pcr);
1114 	void (*init_ocp)(struct rtsx_pcr *pcr);
1115 	void (*process_ocp)(struct rtsx_pcr *pcr);
1116 	int (*get_ocpstat)(struct rtsx_pcr *pcr, u8 *val);
1117 	void (*clear_ocpstat)(struct rtsx_pcr *pcr);
1283 #define CHK_PCI_PID(pcr, pid)		((pcr)->pci->device == (pid))
1284 #define PCI_VID(pcr)			((pcr)->pci->vendor)
1285 #define PCI_PID(pcr)			((pcr)->pci->device)
1286 #define is_version(pcr, pid, ver)				\
1287 	(CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver))
1288 #define is_version_higher_than(pcr, pid, ver)			\
1289 	(CHK_PCI_PID(pcr, pid) && (pcr)->ic_version > (ver))
1290 #define pcr_dbg(pcr, fmt, arg...)				\
1291 	dev_dbg(&(pcr)->pci->dev, fmt, ##arg)
1296 #define SDR104_TX_PHASE(pcr)		SDR104_PHASE((pcr)->tx_initial_phase)
1297 #define SDR50_TX_PHASE(pcr)		SDR50_PHASE((pcr)->tx_initial_phase)
1298 #define DDR50_TX_PHASE(pcr)		DDR50_PHASE((pcr)->tx_initial_phase)
1299 #define SDR104_RX_PHASE(pcr)		SDR104_PHASE((pcr)->rx_initial_phase)
1300 #define SDR50_RX_PHASE(pcr)		SDR50_PHASE((pcr)->rx_initial_phase)
1301 #define DDR50_RX_PHASE(pcr)		DDR50_PHASE((pcr)->rx_initial_phase)
1305 void rtsx_pci_start_run(struct rtsx_pcr *pcr);
1306 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data);
1307 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data);
1308 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
1309 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
1310 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr);
1311 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr,
1313 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
1314 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
1315 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1317 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1319 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1321 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1323 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1324 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1325 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
1326 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card);
1327 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
1329 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card);
1330 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card);
1331 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card);
1332 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage);
1333 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr);
1334 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr);
1336 static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)
1338 	return (u8 *)(pcr->host_cmds_ptr);
1341 static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
1343 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val >> 24);
1344 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
1345 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
1346 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
1349 static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr,
1355 	err = rtsx_pci_read_phy_register(pcr, addr, &val);
1359 	return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append);