linux/platform_data/cros_ec_commands.h

942 	uint32_t version;
956 	uint32_t in_data;
964 	uint32_t out_data;
987 	uint32_t current_image;
999 	uint32_t offset;
1000 	uint32_t size;
1008 	uint32_t data[32];
1090 	uint32_t version_mask;
1113 	uint32_t flags;		/* Mask of enum ec_comms_status */
1121 	uint32_t ec_result;
1122 	uint32_t ret_len;
1148 	uint32_t protocol_versions;
1151 	uint32_t flags;
1168 	uint32_t flags;
1169 	uint32_t value;
1173 	uint32_t flags;
1174 	uint32_t value;
1321 	uint32_t flags[2];
1332 	uint32_t sku_id;
1355 	uint32_t flash_size;
1356 	uint32_t write_block_size;
1357 	uint32_t erase_block_size;
1358 	uint32_t protect_block_size;
1407 	uint32_t flash_size;
1408 	uint32_t write_block_size;
1409 	uint32_t erase_block_size;
1410 	uint32_t protect_block_size;
1413 	uint32_t write_ideal_size;
1414 	uint32_t flags;
1441 	uint32_t flash_size;
1443 	uint32_t flags;
1445 	uint32_t write_ideal_size;
1466 	uint32_t offset;
1467 	uint32_t size;
1483 	uint32_t offset;
1484 	uint32_t size;
1497 	uint32_t offset;
1498 	uint32_t size;
1589 	uint32_t mask;
1590 	uint32_t flags;
1603 	uint32_t flags;
1604 	uint32_t valid_flags;
1605 	uint32_t writable_flags;
1652 	uint32_t region;
1656 	uint32_t offset;
1657 	uint32_t size;
1671 	uint32_t op;
1717 	uint32_t rpm;
1725 	uint32_t rpm;
1730 	uint32_t rpm;
1756 	uint32_t percent;
1761 	uint32_t percent;
2048 			uint32_t num;
2049 			uint32_t flags;
2183 	uint32_t offset;         /* Offset in flash to hash */
2184 	uint32_t size;           /* Number of bytes to hash */
2193 	uint32_t offset;         /* Offset in flash which was hashed */
2194 	uint32_t size;           /* Number of bytes hashed */
2428 			uint32_t    timestamp;
2447 	uint32_t timestamp;
2455 	uint32_t number_data;
2639 			uint32_t max_data_vector;
2731 			uint32_t min_frequency;
2734 			uint32_t max_frequency;
2737 			uint32_t fifo_max_event_count;
2777 			uint32_t enabled;
2778 			uint32_t disabled;
2854 	uint32_t pstore_size;
2856 	uint32_t access_size;
2867 	uint32_t offset;   /* Byte offset to read */
2868 	uint32_t size;     /* Size to read in bytes */
2875 	uint32_t offset;   /* Byte offset to write */
2876 	uint32_t size;     /* Size to write in bytes */
2885 	uint32_t time;
2889 	uint32_t time;
2922 			uint32_t offset;
2923 			uint32_t num_entries;
2931 			uint32_t writes;
2932 			uint32_t history_size;
2933 			uint32_t last_boot;
2958 	uint32_t slot_locked;
3052 	uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
3053 	uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */
3054 	uint32_t temp_fan_off;		/* no active cooling needed */
3055 	uint32_t temp_fan_max;		/* max active cooling needed */
3060 	uint32_t sensor_num;
3069 	uint32_t sensor_num;
3169 	uint32_t rows;
3170 	uint32_t cols;
3207 	 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3210 	 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3213 	 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3231 	uint32_t keyboard_id;
3265 	uint32_t valid_mask;		/* valid fields */
3270 	uint32_t poll_timeout_us;
3330 			uint32_t time_us;
3417 	uint32_t host_event;
3426 	uint32_t buttons;
3428 	uint32_t switches;
3430 	uint32_t fp_events;
3432 	uint32_t sysrq;
3435 	uint32_t cec_events;
3442 	uint32_t host_event;
3451 	uint32_t buttons;
3453 	uint32_t switches;
3455 	uint32_t fp_events;
3457 	uint32_t sysrq;
3460 	uint32_t cec_events;
3568 	uint32_t mask;
3572 	uint32_t mask;
3759 			uint32_t flags;
3821 	uint32_t mode;  /* enum charge_control_mode */
3921 	uint32_t usb_dev_type;
4069 			uint32_t param;		/* enum charge_state_param */
4073 			uint32_t param;		/* param to set */
4074 			uint32_t value;		/* value to set */
4090 			uint32_t value;
4104 	uint32_t limit; /* in mA */
4141 	uint32_t seconds;
4149 	uint32_t time_g3;
4155 	uint32_t time_remaining;
4161 	uint32_t hibernate_delay;
4230 			uint32_t sleep_transitions;
4260 	uint32_t event_mask;
4265 	uint32_t event_mask;
4320 	uint32_t param;
4321 	uint32_t value;
4326 	uint32_t value;
4596 	uint32_t len;
4614 	uint32_t capabilities;
4619 	uint32_t len;
4725 	uint32_t bclk;
4767 	uint32_t total_len;
4768 	uint32_t offset;
4770 	uint32_t len;
4775 	uint32_t total_len;
4796 	uint32_t len;
4800 	uint32_t offset;
4801 	uint32_t len;
4923 	uint32_t curr_lim_ma;       /* input current limit */
4937 	uint32_t status;      /* PD MCU host event status */
5083 	uint32_t max_power;
5111 	uint32_t size;     /* Size to write in bytes */
5127 	uint32_t current_image;  /* One of ec_current_image */
5167 	uint32_t timestamp; /* relative timestamp in milliseconds */
5261 	uint32_t vdo[6]; /* Mode VDOs */
5274 	uint32_t cmd;  /* enum pd_mode_cmd */
5362 	uint32_t status;
5374 	uint32_t action;
5397 	CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5398 	CBI_TAG_OEM_ID = 1,        /* uint32_t or smaller */
5399 	CBI_TAG_SKU_ID = 2,        /* uint32_t or smaller */
5402 	CBI_TAG_MODEL_ID = 5,      /* uint32_t or smaller */
5415 	uint32_t tag;		/* enum cbi_data_tag */
5416 	uint32_t flag;		/* CBI_GET_* */
5431 	uint32_t tag;		/* enum cbi_data_tag */
5432 	uint32_t flag;		/* CBI_SET_* */
5433 	uint32_t size;		/* Data size */
5451 	uint32_t time_since_ec_boot_ms;
5459 	uint32_t ap_resets_since_ec_boot;
5465 	uint32_t ec_reset_flags;
5483 		uint32_t reset_time_ms;
5561 	uint32_t error;			/* enum pchg_error */
5567 	uint32_t fw_version;
5568 	uint32_t dropped_event_count;
5647 	uint32_t version;
5649 	uint32_t crc32;
5651 	uint32_t addr;
5653 	uint32_t size;
5663 	uint32_t block_size;
5684 	uint32_t index;
5699 	uint32_t index;
5711 	uint32_t index;
5729 	uint32_t index;
5730 	uint32_t min_mv;
5731 	uint32_t max_mv;
5743 	uint32_t index;
5747 	uint32_t voltage_mv;
5776 	uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5783 	uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5815 	uint32_t vdm_data[VDO_MAX_SIZE];
5833 		uint32_t clear_events_mask;
5946 	uint32_t events;		/* PD_STATUS_EVENT bitmask */
5961 	uint32_t source_cap_pdos[7];	/* Max 7 PDOs can be present */
5963 	uint32_t sink_cap_pdos[7];	/* Max 7 PDOs can be present */
5984 	uint32_t vdm_response[VDO_MAX_SIZE];
5992 	uint32_t vdm_attention[2];
6080 	uint32_t mode; /* as defined by FP_MODE_ constants */
6084 	uint32_t mode; /* as defined by FP_MODE_ constants */
6105 	uint32_t vendor_id;
6106 	uint32_t product_id;
6107 	uint32_t model_id;
6108 	uint32_t version;
6110 	uint32_t frame_size;
6111 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
6120 	uint32_t vendor_id;
6121 	uint32_t product_id;
6122 	uint32_t model_id;
6123 	uint32_t version;
6125 	uint32_t frame_size;
6126 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
6132 	uint32_t template_size;  /* max template size in bytes */
6135 	uint32_t template_dirty; /* bitmap of templates with MCU side changes */
6136 	uint32_t template_version; /* version of the template format */
6156 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
6183 	uint32_t offset;
6184 	uint32_t size;
6194 	uint32_t offset;
6195 	uint32_t size;
6203 	uint32_t userid[FP_CONTEXT_USERID_WORDS];
6212 	uint32_t capture_time_us;
6213 	uint32_t matching_time_us;
6214 	uint32_t overall_time_us;
6216 		uint32_t lo;
6217 		uint32_t hi;
6242 	uint32_t valid_flags;
6244 	uint32_t status;
6257 	uint32_t n_frames;
6258 	uint32_t frame_sizes[];
6268 	uint32_t frame_index;
6269 	uint32_t offset;
6270 	uint32_t size;
6310 	uint32_t cycle_count;