linux/firmware/xlnx-zynqmp.h

526 	u32 qid;
527 	u32 arg1;
528 	u32 arg2;
529 	u32 arg3;
532 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...);
535 int zynqmp_pm_get_api_version(u32 *version);
536 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version);
537 int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily);
538 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out);
539 int zynqmp_pm_clock_enable(u32 clock_id);
540 int zynqmp_pm_clock_disable(u32 clock_id);
541 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state);
542 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider);
543 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider);
544 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id);
545 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id);
546 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode);
547 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode);
548 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data);
549 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data);
550 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value);
551 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type);
552 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select);
555 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status);
556 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode);
557 int zynqmp_pm_bootmode_write(u32 ps_mode);
559 int zynqmp_pm_set_suspend_mode(u32 mode);
560 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
561 			   const u32 qos, const enum zynqmp_pm_request_ack ack);
562 int zynqmp_pm_release_node(const u32 node);
563 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
564 			      const u32 qos,
566 int zynqmp_pm_aes_engine(const u64 address, u32 *out);
567 int zynqmp_pm_efuse_access(const u64 address, u32 *out);
568 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
569 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);
570 int zynqmp_pm_fpga_get_status(u32 *value);
571 int zynqmp_pm_fpga_get_config_status(u32 *value);
572 int zynqmp_pm_write_ggs(u32 index, u32 value);
573 int zynqmp_pm_read_ggs(u32 index, u32 *value);
574 int zynqmp_pm_write_pggs(u32 index, u32 value);
575 int zynqmp_pm_read_pggs(u32 index, u32 *value);
576 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value);
577 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype);
578 int zynqmp_pm_set_boot_health_status(u32 value);
579 int zynqmp_pm_pinctrl_request(const u32 pin);
580 int zynqmp_pm_pinctrl_release(const u32 pin);
581 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id);
582 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
583 				 u32 *value);
584 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
585 				 u32 value);
586 int zynqmp_pm_load_pdi(const u32 src, const u64 address);
587 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
588 				const u32 wake, const u32 enable);
589 int zynqmp_pm_feature(const u32 api_id);
590 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
591 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
592 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
593 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset);
594 int zynqmp_pm_force_pwrdwn(const u32 target,
596 int zynqmp_pm_request_wake(const u32 node,
600 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode);
601 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode);
602 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode);
603 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value);
604 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
605 			     u32 value);
607 static inline int zynqmp_pm_get_api_version(u32 *version)
612 static inline int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
617 static inline int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
623 				       u32 *out)
628 static inline int zynqmp_pm_clock_enable(u32 clock_id)
633 static inline int zynqmp_pm_clock_disable(u32 clock_id)
638 static inline int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
643 static inline int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
648 static inline int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
653 static inline int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
658 static inline int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
663 static inline int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
668 static inline int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
673 static inline int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
678 static inline int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
683 static inline int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
688 static inline int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
693 static inline int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
705 					     u32 *status)
710 static inline unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
715 static inline int zynqmp_pm_bootmode_write(u32 ps_mode)
725 static inline int zynqmp_pm_set_suspend_mode(u32 mode)
730 static inline int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
731 					 const u32 qos,
737 static inline int zynqmp_pm_release_node(const u32 node)
742 static inline int zynqmp_pm_set_requirement(const u32 node,
743 					    const u32 capabilities,
744 					    const u32 qos,
750 static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
755 static inline int zynqmp_pm_efuse_access(const u64 address, u32 *out)
760 static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,
761 				     const u32 flags)
766 static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size,
767 				      const u32 flags)
772 static inline int zynqmp_pm_fpga_get_status(u32 *value)
777 static inline int zynqmp_pm_fpga_get_config_status(u32 *value)
782 static inline int zynqmp_pm_write_ggs(u32 index, u32 value)
787 static inline int zynqmp_pm_read_ggs(u32 index, u32 *value)
792 static inline int zynqmp_pm_write_pggs(u32 index, u32 value)
797 static inline int zynqmp_pm_read_pggs(u32 index, u32 *value)
802 static inline int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
807 static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
812 static inline int zynqmp_pm_set_boot_health_status(u32 value)
817 static inline int zynqmp_pm_pinctrl_request(const u32 pin)
822 static inline int zynqmp_pm_pinctrl_release(const u32 pin)
827 static inline int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
832 static inline int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
837 static inline int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
838 					       u32 *value)
843 static inline int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
844 					       u32 value)
849 static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address)
854 static inline int zynqmp_pm_register_notifier(const u32 node, const u32 event,
855 					      const u32 wake, const u32 enable)
860 static inline int zynqmp_pm_feature(const u32 api_id)
866 					       u32 value)
872 					       u32 *payload)
877 static inline int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
882 static inline int zynqmp_pm_force_pwrdwn(const u32 target,
888 static inline int zynqmp_pm_request_wake(const u32 node,
896 static inline int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
901 static inline int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
906 static inline int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
911 static inline int zynqmp_pm_set_sd_config(u32 node,
913 					  u32 value)
918 static inline int zynqmp_pm_set_gem_config(u32 node,
920 					   u32 value)