Lines Matching defs:table

646  * @table:	array of value/divider pairs, last entry should have div = 0
685 const struct clk_div_table *table;
705 unsigned int val, const struct clk_div_table *table,
709 const struct clk_div_table *table,
713 const struct clk_div_table *table, u8 width,
716 const struct clk_div_table *table, u8 width,
719 const struct clk_div_table *table, u8 width,
722 const struct clk_div_table *table, u8 width,
730 const struct clk_div_table *table, spinlock_t *lock);
736 const struct clk_div_table *table, spinlock_t *lock);
740 u8 clk_divider_flags, const struct clk_div_table *table,
815 * clk_hw_register_divider_table - register a table based divider clock with
825 * @table: array of divider/value pairs ending with a div set to 0
829 shift, width, clk_divider_flags, table, \
833 (clk_divider_flags), (table), (lock))
835 * clk_hw_register_divider_table_parent_hw - register a table based divider
845 * @table: array of divider/value pairs ending with a div set to 0
850 clk_divider_flags, table, \
854 (clk_divider_flags), (table), (lock))
856 * clk_hw_register_divider_table_parent_data - register a table based divider
866 * @table: array of divider/value pairs ending with a div set to 0
871 clk_divider_flags, table, \
875 (width), (clk_divider_flags), (table), \
914 * devm_clk_hw_register_divider_table - register a table based divider clock
924 * @table: array of divider/value pairs ending with a div set to 0
929 clk_divider_flags, table, lock) \
932 (width), (clk_divider_flags), (table), \
943 * @table: array of register values corresponding to the parent index
970 const u32 *table;
995 u8 clk_mux_flags, const u32 *table, spinlock_t *lock);
1002 u8 clk_mux_flags, const u32 *table, spinlock_t *lock);
1006 u8 clk_mux_flags, const u32 *table, spinlock_t *lock);
1015 table, lock) \
1018 (shift), (mask), (clk_mux_flags), (table), \
1022 clk_mux_flags, table, lock) \
1025 (shift), (mask), (clk_mux_flags), (table), \
1046 width, clk_mux_flags, table, \
1050 BIT((width)) - 1, (clk_mux_flags), table, (lock))
1066 width, clk_mux_flags, table, \
1070 BIT((width)) - 1, (clk_mux_flags), table, (lock))
1072 int clk_mux_val_to_index(struct clk_hw *hw, const u32 *table, unsigned int flags,
1074 unsigned int clk_mux_index_to_val(const u32 *table, unsigned int flags, u8 index);
1377 const struct clk_div_table *table,
1381 rate, prate, table, width, flags);
1386 const struct clk_div_table *table,
1391 rate, prate, table, width, flags,