Lines Matching refs:clk_rate
32 * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
37 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
40 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
52 unsigned long clk_rate;
80 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate);
143 udelay(DIV_ROUND_UP(2 * 1000000, priv->clk_rate));
155 udelay(DIV_ROUND_UP(2 * 1000000, priv->clk_rate));
237 priv->clk_rate = clk_get_rate(priv->clk);
242 if (!priv->clk_rate) {
248 clks_per_sec = priv->clk_rate / clk_divs[i];