Lines Matching refs:wdt

44 static inline bool pic32_wdt_is_win_enabled(struct pic32_wdt *wdt)
46 return !!(readl(wdt->regs + WDTCON_REG) & WDTCON_WIN_EN);
49 static inline u32 pic32_wdt_get_post_scaler(struct pic32_wdt *wdt)
51 u32 v = readl(wdt->regs + WDTCON_REG);
56 static inline u32 pic32_wdt_get_clk_id(struct pic32_wdt *wdt)
58 u32 v = readl(wdt->regs + WDTCON_REG);
63 static int pic32_wdt_bootstatus(struct pic32_wdt *wdt)
65 u32 v = readl(wdt->rst_base);
67 writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base));
72 static u32 pic32_wdt_get_timeout_secs(struct pic32_wdt *wdt, struct device *dev)
77 rate = clk_get_rate(wdt->clk);
79 dev_dbg(dev, "wdt: clk_id %d, clk_rate %lu (prescale)\n",
80 pic32_wdt_get_clk_id(wdt), rate);
88 ps = pic32_wdt_get_post_scaler(wdt);
94 "wdt: clk_rate %lu (postscale) / terminal %d, timeout %dsec\n",
100 static void pic32_wdt_keepalive(struct pic32_wdt *wdt)
103 writew(WDTCON_CLR_KEY, wdt->regs + WDTCON_REG + 2);
108 struct pic32_wdt *wdt = watchdog_get_drvdata(wdd);
110 writel(WDTCON_ON, PIC32_SET(wdt->regs + WDTCON_REG));
111 pic32_wdt_keepalive(wdt);
118 struct pic32_wdt *wdt = watchdog_get_drvdata(wdd);
120 writel(WDTCON_ON, PIC32_CLR(wdt->regs + WDTCON_REG));
133 struct pic32_wdt *wdt = watchdog_get_drvdata(wdd);
135 pic32_wdt_keepalive(wdt);
159 { .compatible = "microchip,pic32mzda-wdt", },
169 struct pic32_wdt *wdt;
171 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
172 if (!wdt)
175 wdt->regs = devm_platform_ioremap_resource(pdev, 0);
176 if (IS_ERR(wdt->regs))
177 return PTR_ERR(wdt->regs);
179 wdt->rst_base = devm_ioremap(dev, PIC32_BASE_RESET, 0x10);
180 if (!wdt->rst_base)
183 wdt->clk = devm_clk_get_enabled(dev, NULL);
184 if (IS_ERR(wdt->clk)) {
186 return PTR_ERR(wdt->clk);
189 if (pic32_wdt_is_win_enabled(wdt)) {
194 wdd->timeout = pic32_wdt_get_timeout_secs(wdt, dev);
202 wdd->bootstatus = pic32_wdt_bootstatus(wdt) ? WDIOF_CARDRESET : 0;
205 watchdog_set_drvdata(wdd, wdt);
219 .name = "pic32-wdt",