Lines Matching refs:fb
64 #include <linux/fb.h>
156 #define READ_BYTE(fb, reg) gsc_readb((fb)->info->fix.mmio_start + (reg))
157 #define READ_WORD(fb, reg) gsc_readl((fb)->info->fix.mmio_start + (reg))
163 # define WRITE_BYTE(value, fb, reg) gsc_writeb((value), (fb)->info->fix.mmio_start + (reg))
164 # define WRITE_WORD(value, fb, reg) gsc_writel((value), (fb)->info->fix.mmio_start + (reg))
169 # define WRITE_BYTE(value,fb,reg) do { if (debug_on) \
171 __func__, reg, value, READ_BYTE(fb,reg)); \
172 gsc_writeb((value), (fb)->info->fix.mmio_start + (reg)); } while (0)
173 # define WRITE_WORD(value,fb,reg) do { if (debug_on) \
175 __func__, reg, value, READ_WORD(fb,reg)); \
176 gsc_writel((value), (fb)->info->fix.mmio_start + (reg)); } while (0)
187 SETUP_HW(struct stifb_info *fb)
192 stat = READ_BYTE(fb, REG_15b0);
194 stat = READ_BYTE(fb, REG_15b0);
200 SETUP_FB(struct stifb_info *fb)
204 SETUP_HW(fb);
205 switch (fb->id)
213 if (fb->info->var.bits_per_pixel == 32)
219 if (fb->info->var.bits_per_pixel == 32)
230 WRITE_WORD(reg10_value, fb, REG_10);
231 WRITE_WORD(0x83000300, fb, REG_14);
232 SETUP_HW(fb);
233 WRITE_BYTE(1, fb, REG_16b1);
237 START_IMAGE_COLORMAP_ACCESS(struct stifb_info *fb)
239 SETUP_HW(fb);
240 WRITE_WORD(0xBBE0F000, fb, REG_10);
241 WRITE_WORD(0x03000300, fb, REG_14);
242 WRITE_WORD(~0, fb, REG_13);
246 WRITE_IMAGE_COLOR(struct stifb_info *fb, int index, int color)
248 SETUP_HW(fb);
249 WRITE_WORD(((0x100+index)<<2), fb, REG_3);
250 WRITE_WORD(color, fb, REG_4);
254 FINISH_IMAGE_COLORMAP_ACCESS(struct stifb_info *fb)
256 WRITE_WORD(0x400, fb, REG_2);
257 if (fb->info->var.bits_per_pixel == 32) {
258 WRITE_WORD(0x83000100, fb, REG_1);
260 if (fb->id == S9000_ID_ARTIST || fb->id == CRT_ID_VISUALIZE_EG)
261 WRITE_WORD(0x80000100, fb, REG_26);
263 WRITE_WORD(0x80000100, fb, REG_1);
265 SETUP_FB(fb);
269 SETUP_RAMDAC(struct stifb_info *fb)
271 SETUP_HW(fb);
272 WRITE_WORD(0x04000000, fb, 0x1020);
273 WRITE_WORD(0xff000000, fb, 0x1028);
277 CRX24_SETUP_RAMDAC(struct stifb_info *fb)
279 SETUP_HW(fb);
280 WRITE_WORD(0x04000000, fb, 0x1000);
281 WRITE_WORD(0x02000000, fb, 0x1004);
282 WRITE_WORD(0xff000000, fb, 0x1008);
283 WRITE_WORD(0x05000000, fb, 0x1000);
284 WRITE_WORD(0x02000000, fb, 0x1004);
285 WRITE_WORD(0x03000000, fb, 0x1008);
290 HCRX_SETUP_RAMDAC(struct stifb_info *fb)
292 WRITE_WORD(0xffffffff, fb, REG_32);
297 CRX24_SET_OVLY_MASK(struct stifb_info *fb)
299 SETUP_HW(fb);
300 WRITE_WORD(0x13a02000, fb, REG_11);
301 WRITE_WORD(0x03000300, fb, REG_14);
302 WRITE_WORD(0x000017f0, fb, REG_3);
303 WRITE_WORD(0xffffffff, fb, REG_13);
304 WRITE_WORD(0xffffffff, fb, REG_22);
305 WRITE_WORD(0x00000000, fb, REG_23);
309 ENABLE_DISABLE_DISPLAY(struct stifb_info *fb, int enable)
312 SETUP_HW(fb);
313 WRITE_WORD(0x06000000, fb, 0x1030);
314 WRITE_WORD(value, fb, 0x1038);
318 CRX24_ENABLE_DISABLE_DISPLAY(struct stifb_info *fb, int enable)
321 SETUP_HW(fb);
322 WRITE_WORD(0x01000000, fb, 0x1000);
323 WRITE_WORD(0x02000000, fb, 0x1004);
324 WRITE_WORD(value, fb, 0x1008);
328 ARTIST_ENABLE_DISABLE_DISPLAY(struct stifb_info *fb, int enable)
333 SETUP_HW(fb);
335 WRITE_WORD(READ_WORD(fb, DregsMiscVideo) | 0x0A000000, fb, DregsMiscVideo);
336 WRITE_WORD(READ_WORD(fb, DregsMiscCtl) | 0x00800000, fb, DregsMiscCtl);
338 WRITE_WORD(READ_WORD(fb, DregsMiscVideo) & ~0x0A000000, fb, DregsMiscVideo);
339 WRITE_WORD(READ_WORD(fb, DregsMiscCtl) & ~0x00800000, fb, DregsMiscCtl);
343 #define GET_ROMTABLE_INDEX(fb) \
344 (READ_BYTE(fb, REG_16b3) - 1)
348 #define IS_24_DEVICE(fb) \
349 (fb->deviceSpecificConfig & HYPER_CONFIG_PLANES_24)
351 #define IS_888_DEVICE(fb) \
352 (!(IS_24_DEVICE(fb)))
354 #define GET_FIFO_SLOTS(fb, cnt, numslots) \
356 cnt = READ_WORD(fb, REG_34); \
391 #define NGLE_QUICK_SET_IMAGE_BITMAP_OP(fb, val) \
392 WRITE_WORD(val, fb, REG_14)
394 #define NGLE_QUICK_SET_DST_BM_ACCESS(fb, val) \
395 WRITE_WORD(val, fb, REG_11)
397 #define NGLE_QUICK_SET_CTL_PLN_REG(fb, val) \
398 WRITE_WORD(val, fb, REG_12)
400 #define NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, plnmsk32) \
401 WRITE_WORD(plnmsk32, fb, REG_13)
403 #define NGLE_REALLY_SET_IMAGE_FG_COLOR(fb, fg32) \
404 WRITE_WORD(fg32, fb, REG_35)
406 #define NGLE_SET_TRANSFERDATA(fb, val) \
407 WRITE_WORD(val, fb, REG_8)
409 #define NGLE_SET_DSTXY(fb, val) \
410 WRITE_WORD(val, fb, REG_6)
418 #define NGLE_BINC_SET_DSTADDR(fb, addr) \
419 WRITE_WORD(addr, fb, REG_3)
421 #define NGLE_BINC_SET_SRCADDR(fb, addr) \
422 WRITE_WORD(addr, fb, REG_2)
424 #define NGLE_BINC_SET_DSTMASK(fb, mask) \
425 WRITE_WORD(mask, fb, REG_22)
427 #define NGLE_BINC_WRITE32(fb, data32) \
428 WRITE_WORD(data32, fb, REG_23)
430 #define START_COLORMAPLOAD(fb, cmapBltCtlData32) \
431 WRITE_WORD((cmapBltCtlData32), fb, REG_38)
433 #define SET_LENXY_START_RECFILL(fb, lenxy) \
434 WRITE_WORD(lenxy, fb, REG_9)
436 #define SETUP_COPYAREA(fb) \
437 WRITE_BYTE(0, fb, REG_16b1)
440 HYPER_ENABLE_DISABLE_DISPLAY(struct stifb_info *fb, int enable)
444 SETUP_HW(fb);
445 value = READ_WORD(fb, DregsHypMiscVideo);
450 WRITE_WORD(value, fb, DregsHypMiscVideo);
463 SETUP_ATTR_ACCESS(struct stifb_info *fb, unsigned BufferNumber)
465 SETUP_HW(fb);
466 WRITE_WORD(0x2EA0D000, fb, REG_11);
467 WRITE_WORD(0x23000302, fb, REG_14);
468 WRITE_WORD(BufferNumber, fb, REG_12);
469 WRITE_WORD(0xffffffff, fb, REG_8);
473 SET_ATTR_SIZE(struct stifb_info *fb, int width, int height)
482 WRITE_WORD(0x00000000, fb, REG_6);
483 WRITE_WORD((width<<16) | height, fb, REG_9);
484 WRITE_WORD(0x05000000, fb, REG_6);
485 WRITE_WORD(0x00040001, fb, REG_9);
489 FINISH_ATTR_ACCESS(struct stifb_info *fb)
491 SETUP_HW(fb);
492 WRITE_WORD(0x00000000, fb, REG_12);
496 elkSetupPlanes(struct stifb_info *fb)
498 SETUP_RAMDAC(fb);
499 SETUP_FB(fb);
503 ngleSetupAttrPlanes(struct stifb_info *fb, int BufferNumber)
505 SETUP_ATTR_ACCESS(fb, BufferNumber);
506 SET_ATTR_SIZE(fb, fb->info->var.xres, fb->info->var.yres);
507 FINISH_ATTR_ACCESS(fb);
508 SETUP_FB(fb);
513 rattlerSetupPlanes(struct stifb_info *fb)
521 CRX24_SETUP_RAMDAC(fb);
523 /* change fb->id temporarily to fool SETUP_FB() */
524 saved_id = fb->id;
525 fb->id = CRX24_OVERLAY_PLANES;
526 SETUP_FB(fb);
527 fb->id = saved_id;
529 for (y = 0; y < fb->info->var.yres; ++y)
530 fb_memset_io(fb->info->screen_base + y * fb->info->fix.line_length,
531 0xff, fb->info->var.xres * fb->info->var.bits_per_pixel/8);
533 CRX24_SET_OVLY_MASK(fb);
534 SETUP_FB(fb);
560 setNgleLutBltCtl(struct stifb_info *fb, int offsetWithinLut, int length)
568 switch (fb->id)
571 if (fb->var.bits_per_pixel == 8) {
599 setHyperLutBltCtl(struct stifb_info *fb, int offsetWithinLut, int length)
610 if (fb->info->var.bits_per_pixel == 8)
622 static void hyperUndoITE(struct stifb_info *fb)
627 NGLE_LOCK(fb);
629 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 1);
630 WRITE_WORD(0xffffffff, fb, REG_32);
635 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 7);
636 NGLE_QUICK_SET_DST_BM_ACCESS(fb,
639 NGLE_QUICK_SET_IMAGE_BITMAP_OP(fb,
646 NGLE_BINC_SET_DSTADDR(fb, fbAddr);
647 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, 0xffffff);
648 NGLE_BINC_SET_DSTMASK(fb, 0xffffffff);
651 NGLE_BINC_WRITE32(fb, 0);
653 NGLE_UNLOCK(fb);
657 ngleDepth8_ClearImagePlanes(struct stifb_info *fb)
663 ngleDepth24_ClearImagePlanes(struct stifb_info *fb)
669 ngleResetAttrPlanes(struct stifb_info *fb, unsigned int ctlPlaneReg)
675 NGLE_LOCK(fb);
677 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 4);
678 NGLE_QUICK_SET_DST_BM_ACCESS(fb,
682 NGLE_QUICK_SET_CTL_PLN_REG(fb, ctlPlaneReg);
683 NGLE_SET_TRANSFERDATA(fb, 0xffffffff);
685 NGLE_QUICK_SET_IMAGE_BITMAP_OP(fb,
691 packed_len = (fb->info->var.xres << 16) | fb->info->var.yres;
692 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 2);
693 NGLE_SET_DSTXY(fb, packed_dst);
694 SET_LENXY_START_RECFILL(fb, packed_len);
704 if (fb->id == S9000_ID_A1659A) { /* ELK_DEVICE_ID */
707 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 2);
708 NGLE_SET_DSTXY(fb, packed_dst);
710 SET_LENXY_START_RECFILL(fb, packed_len);
714 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 1);
715 NGLE_QUICK_SET_CTL_PLN_REG(fb, 0);
717 NGLE_UNLOCK(fb);
721 ngleClearOverlayPlanes(struct stifb_info *fb, int mask, int data)
727 NGLE_LOCK(fb);
730 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 8);
731 NGLE_QUICK_SET_DST_BM_ACCESS(fb,
735 NGLE_SET_TRANSFERDATA(fb, 0xffffffff); /* Write foreground color */
737 NGLE_REALLY_SET_IMAGE_FG_COLOR(fb, data);
738 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, mask);
741 packed_len = (fb->info->var.xres << 16) | fb->info->var.yres;
742 NGLE_SET_DSTXY(fb, packed_dst);
745 NGLE_QUICK_SET_IMAGE_BITMAP_OP(fb,
750 SET_LENXY_START_RECFILL(fb, packed_len);
752 NGLE_UNLOCK(fb);
756 hyperResetPlanes(struct stifb_info *fb, int enable)
760 NGLE_LOCK(fb);
762 if (IS_24_DEVICE(fb))
763 if (fb->info->var.bits_per_pixel == 32)
773 if (IS_24_DEVICE(fb))
774 ngleDepth24_ClearImagePlanes(fb);
776 ngleDepth8_ClearImagePlanes(fb);
780 ngleResetAttrPlanes(fb, controlPlaneReg);
783 ngleClearOverlayPlanes(fb, 0xff, 255);
788 hyperUndoITE(fb);
793 if (IS_24_DEVICE(fb))
794 ngleDepth24_ClearImagePlanes(fb);
796 ngleDepth8_ClearImagePlanes(fb);
797 ngleResetAttrPlanes(fb, controlPlaneReg);
798 ngleClearOverlayPlanes(fb, 0xff, 0);
802 hyperUndoITE(fb);
803 ngleResetAttrPlanes(fb, controlPlaneReg);
807 NGLE_UNLOCK(fb);
813 ngleGetDeviceRomData(struct stifb_info *fb)
827 pPackedDevRomData = fb->ngle_rom;
829 SETUP_HW(fb);
830 if (fb->id == S9000_ID_ARTIST) {
835 pBytePerLongDevDepData = fb->sti->regions[NGLEDEVDEPROM_CRT_REGION];
838 if (fb->id == S9000_ID_TOMCAT)
869 SETUP_FB(fb);
881 SETUP_HCRX(struct stifb_info *fb)
886 if (fb->id != S9000_ID_HCRX)
890 GET_FIFO_SLOTS(fb, nFreeFifoSlots, 7);
892 if (IS_24_DEVICE(fb)) {
893 hyperbowl = (fb->info->var.bits_per_pixel == 32) ?
898 WRITE_WORD(hyperbowl, fb, REG_40);
899 WRITE_WORD(hyperbowl, fb, REG_40);
901 WRITE_WORD(HYPERBOWL_MODE2_8_24, fb, REG_39);
903 WRITE_WORD(0x014c0148, fb, REG_42); /* Set lut 0 to be the direct color */
904 WRITE_WORD(0x404c4048, fb, REG_43);
905 WRITE_WORD(0x034c0348, fb, REG_44);
906 WRITE_WORD(0x444c4448, fb, REG_45);
911 WRITE_WORD(hyperbowl, fb, REG_40);
912 WRITE_WORD(hyperbowl, fb, REG_40);
914 WRITE_WORD(0x00000000, fb, REG_42);
915 WRITE_WORD(0x00000000, fb, REG_43);
916 WRITE_WORD(0x00000000, fb, REG_44);
917 WRITE_WORD(0x444c4048, fb, REG_45);
927 struct stifb_info *fb = info->par;
929 if (var->xres != fb->info->var.xres ||
930 var->yres != fb->info->var.yres ||
931 var->bits_per_pixel != fb->info->var.bits_per_pixel)
938 var->grayscale = fb->info->var.grayscale;
939 var->red.length = fb->info->var.red.length;
940 var->green.length = fb->info->var.green.length;
941 var->blue.length = fb->info->var.blue.length;
950 struct stifb_info *fb = info->par;
962 START_IMAGE_COLORMAP_ACCESS(fb);
964 if (unlikely(fb->info->var.grayscale)) {
975 if (fb->info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
976 struct fb_var_screeninfo *var = &fb->info->var;
978 ((u32 *)fb->info->pseudo_palette)[regno] =
984 WRITE_IMAGE_COLOR(fb, regno, color);
986 if (fb->id == S9000_ID_HCRX) {
989 lutBltCtl = setHyperLutBltCtl(fb,
992 NGLE_BINC_SET_SRCADDR(fb,
995 START_COLORMAPLOAD(fb, lutBltCtl.all);
996 SETUP_FB(fb);
999 FINISH_IMAGE_COLORMAP_ACCESS(fb);
1010 struct stifb_info *fb = info->par;
1013 switch (fb->id) {
1015 CRX24_ENABLE_DISABLE_DISPLAY(fb, enable);
1019 ARTIST_ENABLE_DISABLE_DISPLAY(fb, enable);
1022 HYPER_ENABLE_DISABLE_DISPLAY(fb, enable);
1028 ENABLE_DISABLE_DISPLAY(fb, enable);
1032 SETUP_FB(fb);
1039 struct stifb_info *fb = info->par;
1041 SETUP_COPYAREA(fb);
1043 SETUP_HW(fb);
1044 if (fb->info->var.bits_per_pixel == 32) {
1045 WRITE_WORD(0xBBA0A000, fb, REG_10);
1047 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, 0xffffffff);
1049 WRITE_WORD(fb->id == S9000_ID_HCRX ? 0x13a02000 : 0x13a01000, fb, REG_10);
1051 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, 0xff);
1054 NGLE_QUICK_SET_IMAGE_BITMAP_OP(fb,
1059 WRITE_WORD(((area->sx << 16) | area->sy), fb, REG_24);
1060 WRITE_WORD(((area->width << 16) | area->height), fb, REG_7);
1061 WRITE_WORD(((area->dx << 16) | area->dy), fb, REG_25);
1063 SETUP_FB(fb);
1078 struct stifb_info *fb = info->par;
1081 (fb->id == S9000_ID_HCRX && fb->info->var.bits_per_pixel == 32))
1084 SETUP_HW(fb);
1086 if (fb->info->var.bits_per_pixel == 32) {
1087 WRITE_WORD(0xBBA0A000, fb, REG_10);
1089 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, 0xffffffff);
1091 WRITE_WORD(fb->id == S9000_ID_HCRX ? 0x13a02000 : 0x13a01000, fb, REG_10);
1093 NGLE_REALLY_SET_IMAGE_PLANEMASK(fb, 0xff);
1096 WRITE_WORD(0x03000300, fb, ARTIST_BITMAP_OP);
1097 WRITE_WORD(0x2ea01000, fb, ARTIST_SRC_BM_ACCESS);
1098 NGLE_QUICK_SET_DST_BM_ACCESS(fb, 0x2ea01000);
1099 NGLE_REALLY_SET_IMAGE_FG_COLOR(fb, rect->color);
1100 WRITE_WORD(0, fb, ARTIST_BGCOLOR);
1102 NGLE_SET_DSTXY(fb, (rect->dx << 16) | (rect->dy));
1103 SET_LENXY_START_RECFILL(fb, (rect->width << 16) | (rect->height));
1105 SETUP_FB(fb);
1109 stifb_init_display(struct stifb_info *fb)
1111 int id = fb->id;
1113 SETUP_FB(fb);
1116 SETUP_HCRX(fb);
1120 hyperInitSprite(fb);
1122 ngleInitSprite(fb);
1128 hyperResetPlanes(fb, ENABLE);
1131 rattlerSetupPlanes(fb);
1136 elkSetupPlanes(fb);
1144 if (fb->info->var.bits_per_pixel == 32)
1145 ngleSetupAttrPlanes(fb, BUFF1_CMAP3);
1147 ngleSetupAttrPlanes(fb, BUFF1_CMAP0);
1150 ngleClearOverlayPlanes(fb, 0xff, 0);
1154 if (fb->info->var.bits_per_pixel == 32)
1155 ngleSetupAttrPlanes(fb, BUFF1_CMAP3);
1157 ngleSetupAttrPlanes(fb, ARTIST_CMAP0);
1161 stifb_blank(0, fb->info); /* 0=enable screen */
1163 SETUP_FB(fb);
1189 struct stifb_info *fb;
1196 info = framebuffer_alloc(sizeof(*fb), sti->dev);
1199 fb = info->par;
1200 fb->info = info;
1206 fb->sti = sti;
1209 fb->id = fb->sti->graphics_id[0];
1212 switch (fb->id) {
1237 dev_name, fb->id);
1243 xres = sti_onscreen_x(fb->sti);
1244 yres = sti_onscreen_y(fb->sti);
1246 ngleGetDeviceRomData(fb);
1249 fix->mmio_start = REGION_BASE(fb,2);
1253 switch (fb->id) {
1258 fb->id = S9000_ID_A1659A;
1268 * fb.iobase = REGION_BASE(fb_info,3);
1269 * fb.screen_base = ioremap(REGION_BASE(fb_info,2),xxx);
1271 xres = fb->ngle_rom.x_size_visible;
1272 yres = fb->ngle_rom.y_size_visible;
1273 fb->id = S9000_ID_A1659A;
1279 memset(&fb->ngle_rom, 0, sizeof(fb->ngle_rom));
1280 if ((fb->sti->regions_phys[0] & 0xfc000000) ==
1281 (fb->sti->regions_phys[2] & 0xfc000000))
1282 sti_rom_address = F_EXTEND(fb->sti->regions_phys[0]);
1284 sti_rom_address = F_EXTEND(fb->sti->regions_phys[1]);
1286 fb->deviceSpecificConfig = gsc_readl(sti_rom_address);
1287 if (IS_24_DEVICE(fb)) {
1294 READ_WORD(fb, REG_15);
1295 SETUP_HW(fb);
1305 fb->id);
1312 fb->id);
1319 fix->smem_start = F_EXTEND(fb->sti->regions_phys[1]);
1320 fix->smem_len = fb->sti->regions[1].region_desc.length * 4096;
1322 fix->line_length = (fb->sti->glob_cfg->total_x * bpp) / 8;
1362 info->screen_base = ioremap(REGION_BASE(fb,1), fix->smem_len);
1369 info->pseudo_palette = &fb->pseudo_palette;
1377 stifb_init_display(fb);
1379 if (!request_mem_region(fix->smem_start, fix->smem_len, "stifb fb")) {
1380 printk(KERN_ERR "stifb: cannot reserve fb region 0x%04lx-0x%04lx\n",
1392 if (register_framebuffer(fb->info) < 0)
1395 fb_info(fb->info, "%s %dx%d-%d frame buffer device, %s, id: %04x, mmio: 0x%04lx\n",
1401 fb->id,