fbdev/riva/nv_driver.c

46 static inline unsigned char MISCin(struct riva_par *par)
48 	return (VGA_RD08(par->riva.PVIO, 0x3cc));
52 riva_is_connected(struct riva_par *par, Bool second)
54 	volatile U032 __iomem *PRAMDAC = par->riva.PRAMDAC0;
69 	NV_WR32(par->riva.PRAMDAC0, 0x0610, 0x94050140);
70 	NV_WR32(par->riva.PRAMDAC0, 0x0608, 0x00001000);
76 	NV_WR32(par->riva.PRAMDAC0, 0x0608,
77 		NV_RD32(par->riva.PRAMDAC0, 0x0608) & 0x0000EFFF);
86 riva_override_CRTC(struct riva_par *par)
90 		par->SecondCRTC ? 1 : 0);
92 	if(par->forceCRTC != -1) {
94 			"Forcing usage of CRTC %i\n", par->forceCRTC);
95 		par->SecondCRTC = par->forceCRTC;
100 riva_is_second(struct riva_par *par)
102 	if (par->FlatPanel == 1) {
103 		switch(par->Chipset & 0xffff) {
130 			par->SecondCRTC = TRUE;
133 			par->SecondCRTC = FALSE;
137 		if(riva_is_connected(par, 0)) {
139 			if (NV_RD32(par->riva.PRAMDAC0, 0x0000052C) & 0x100)
140 				par->SecondCRTC = TRUE;
142 				par->SecondCRTC = FALSE;
144 		if (riva_is_connected(par, 1)) {
145 			if(NV_RD32(par->riva.PRAMDAC0, 0x0000252C) & 0x100)
146 				par->SecondCRTC = TRUE;
148 				par->SecondCRTC = FALSE;
150 			par->SecondCRTC = FALSE;
152 	riva_override_CRTC(par);
155 unsigned long riva_get_memlen(struct riva_par *par)
157 	RIVA_HW_INST *chip = &par->riva;
159 	unsigned int chipset = par->Chipset;
162 	int domain = pci_domain_nr(par->pdev->bus);
273 unsigned long riva_get_maxdclk(struct riva_par *par)
275 	RIVA_HW_INST *chip = &par->riva;
315 riva_common_setup(struct riva_par *par)
317 	par->riva.EnableIRQ = 0;
318 	par->riva.PRAMDAC0 =
319 		(volatile U032 __iomem *)(par->ctrl_base + 0x00680000);
320 	par->riva.PFB =
321 		(volatile U032 __iomem *)(par->ctrl_base + 0x00100000);
322 	par->riva.PFIFO =
323 		(volatile U032 __iomem *)(par->ctrl_base + 0x00002000);
324 	par->riva.PGRAPH =
325 		(volatile U032 __iomem *)(par->ctrl_base + 0x00400000);
326 	par->riva.PEXTDEV =
327 		(volatile U032 __iomem *)(par->ctrl_base + 0x00101000);
328 	par->riva.PTIMER =
329 		(volatile U032 __iomem *)(par->ctrl_base + 0x00009000);
330 	par->riva.PMC =
331 		(volatile U032 __iomem *)(par->ctrl_base + 0x00000000);
332 	par->riva.FIFO =
333 		(volatile U032 __iomem *)(par->ctrl_base + 0x00800000);
334 	par->riva.PCIO0 = par->ctrl_base + 0x00601000;
335 	par->riva.PDIO0 = par->ctrl_base + 0x00681000;
336 	par->riva.PVIO = par->ctrl_base + 0x000C0000;
338 	par->riva.IO = (MISCin(par) & 0x01) ? 0x3D0 : 0x3B0;
340 	if (par->FlatPanel == -1) {
341 		switch (par->Chipset & 0xffff) {
370 			par->FlatPanel = 1;
377 	switch (par->Chipset & 0x0ff0) {
379 		if (par->Chipset == NV_CHIP_GEFORCE2_GO)
380 			par->SecondCRTC = TRUE;
382 		if (par->FlatPanel == 1)
383 			par->SecondCRTC = TRUE;
385 		riva_override_CRTC(par);
397 		riva_is_second(par);
403 	if (par->SecondCRTC) {
404 		par->riva.PCIO = par->riva.PCIO0 + 0x2000;
405 		par->riva.PCRTC = par->riva.PCRTC0 + 0x800;
406 		par->riva.PRAMDAC = par->riva.PRAMDAC0 + 0x800;
407 		par->riva.PDIO = par->riva.PDIO0 + 0x2000;
409 		par->riva.PCIO = par->riva.PCIO0;
410 		par->riva.PCRTC = par->riva.PCRTC0;
411 		par->riva.PRAMDAC = par->riva.PRAMDAC0;
412 		par->riva.PDIO = par->riva.PDIO0;
415 	if (par->FlatPanel == -1) {
417 		par->FlatPanel = 0;
419 	par->riva.flatPanel = (par->FlatPanel > 0) ? TRUE : FALSE;
421 	RivaGetConfig(&par->riva, par->pdev, par->Chipset);