fbdev/matrox/matroxfb_Ti3026.c

283 static int Ti3026_calcclock(const struct matrox_fb_info *minfo,
292 	fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost);
299 static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)
303 	struct matrox_hw_state *hw = &minfo->hw;
307 	f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
317 		Bpp = minfo->curr.final_bppShift;
319 		if (minfo->fbcon.var.bits_per_pixel == 24) {
338 		if (minfo->fbcon.var.bits_per_pixel == 24) {
341 			if (minfo->accel.ramdac_rev > 0x20) {
342 				if (isInterleave(minfo))
349 				if (isInterleave(minfo))
357 			if (minfo->devflags.mga_24bpp_fix)
369 static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
371 	u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
372 	struct matrox_hw_state *hw = &minfo->hw;
377 	switch (minfo->fbcon.var.bits_per_pixel) {
392 			hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
409 	if (matroxfb_vgaHWinit(minfo, m)) return 1;
421 	if (minfo->video.len < 0x400000)
423 	else if (minfo->video.len > 0x400000)
435 	if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000;
438 	Ti3026_setpclk(minfo, m->pixclock);
442 static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout)
452 	f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
455 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
456 	pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA);
457 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFD);
458 	pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA);
459 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
460 	pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA);
463 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
464 	outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
467 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
468 	outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0);
469 	outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m);
470 	outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0);
474 		if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
482 	mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL);
483 	outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7);
484 	outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4);
487 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFB);
488 	outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00);
491 	outTi3026(minfo, TVP3026_XPLLADDR, 0xF3);
492 	outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0);
493 	outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m);
494 	outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0);
498 		if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40)
506 	if (isMilleniumII(minfo)) {
515 	minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16);
516 	pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
519 	outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
520 	outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl       ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4);
523 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
524 	outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
527 	outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
528 	outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n);
529 	outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m);
530 	outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p);
534 		if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
542 static void ti3026_ramdac_init(struct matrox_fb_info *minfo)
546 	minfo->features.pll.vco_freq_min = 110000;
547 	minfo->features.pll.ref_freq	 = 114545;
548 	minfo->features.pll.feed_div_min = 2;
549 	minfo->features.pll.feed_div_max = 24;
550 	minfo->features.pll.in_div_min	 = 2;
551 	minfo->features.pll.in_div_max	 = 63;
552 	minfo->features.pll.post_shift_max = 3;
553 	if (minfo->devflags.noinit)
555 	ti3026_setMCLK(minfo, 60000);
558 static void Ti3026_restore(struct matrox_fb_info *minfo)
562 	struct matrox_hw_state *hw = &minfo->hw;
576 	pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
580 	matroxfb_vgaHWrestore(minfo);
584 	minfo->crtc1.panpos = -1;
589 		outTi3026(minfo, DACseq[i], hw->DACreg[i]);
592 	outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
593 	progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
594 	progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
595 	outTi3026(minfo, TVP3026_XPLLADDR, 0x15);
596 	progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
597 	progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
598 	outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
599 	progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
600 	progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
609 		outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]);
610 		outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
611 		outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0);
612 		outTi3026(minfo, TVP3026_XPIXPLLDATA, 0);
614 		outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
616 			outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]);
620 			outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
622 				if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
635 		outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]);
636 		outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
638 			outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]);
644 			outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
646 				if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40)
671 static void Ti3026_reset(struct matrox_fb_info *minfo)
675 	ti3026_ramdac_init(minfo);
682 static int Ti3026_preinit(struct matrox_fb_info *minfo)
690 	struct matrox_hw_state *hw = &minfo->hw;
694 	minfo->millenium = 1;
695 	minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL);
696 	minfo->capable.cfb4 = 1;
697 	minfo->capable.text = 1; /* isMilleniumII(minfo); */
698 	minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1;
700 	minfo->outputs[0].data = minfo;
701 	minfo->outputs[0].output = &ti3026_output;
702 	minfo->outputs[0].src = minfo->outputs[0].default_src;
703 	minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR;
705 	if (minfo->devflags.noinit)
710 	if (minfo->devflags.novga)
712 	if (minfo->devflags.nobios)
714 	if (minfo->devflags.nopciretry)
716 	pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
718 	minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV);
720 	outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
721 	outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
722 	outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA);
724 	outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
725 	outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00);
726 	outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
730 	outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);