fbdev/i810/i810_main.c

162  * @mmio: address of register space
168 static void i810_screen_off(u8 __iomem *mmio, u8 mode)
173 	i810_writeb(SR_INDEX, mmio, SR01);
174 	val = i810_readb(SR_DATA, mmio);
178 	while((i810_readw(DISP_SL, mmio) & 0xFFF) && count--);
179 	i810_writeb(SR_INDEX, mmio, SR01);
180 	i810_writeb(SR_DATA, mmio, val);
185  * @mmio: address of register space
192 static void i810_dram_off(u8 __iomem *mmio, u8 mode)
196 	val = i810_readb(DRAMCH, mmio);
199 	i810_writeb(DRAMCH, mmio, val);
204  * @mmio: address of register space
211 static void i810_protect_regs(u8 __iomem *mmio, int mode)
215 	i810_writeb(CR_INDEX_CGA, mmio, CR11);
216 	reg = i810_readb(CR_DATA_CGA, mmio);
220 	i810_writeb(CR_INDEX_CGA, mmio, CR11);
221 	i810_writeb(CR_DATA_CGA, mmio, reg);
234 	u8 __iomem *mmio = par->mmio_start_virtual;
237 	tmp2 = i810_readl(DCLK_2D, mmio);
239 	i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
242 	tmp2 = i810_readl(DCLK_0DS, mmio);
244 	i810_writel(DCLK_0DS, mmio, (tmp1 << 16) | tmp2);
246 	i810_writeb(MSR_WRITE, mmio, par->regs.msr | 0xC8 | 1);
259 	u8 __iomem *mmio = par->mmio_start_virtual;
262 	i810_writeb(CR_INDEX_CGA, mmio, CR70);
263 	i810_writeb(CR_DATA_CGA, mmio, par->interlace);
265 	i810_writeb(CR_INDEX_CGA, mmio, CR00);
266 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr00);
267 	i810_writeb(CR_INDEX_CGA, mmio, CR01);
268 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr01);
269 	i810_writeb(CR_INDEX_CGA, mmio, CR02);
270 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr02);
271 	i810_writeb(CR_INDEX_CGA, mmio, CR03);
272 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr03);
273 	i810_writeb(CR_INDEX_CGA, mmio, CR04);
274 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr04);
275 	i810_writeb(CR_INDEX_CGA, mmio, CR05);
276 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr05);
277 	i810_writeb(CR_INDEX_CGA, mmio, CR06);
278 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr06);
279 	i810_writeb(CR_INDEX_CGA, mmio, CR09);
280 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr09);
281 	i810_writeb(CR_INDEX_CGA, mmio, CR10);
282 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr10);
283 	i810_writeb(CR_INDEX_CGA, mmio, CR11);
284 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr11);
285 	i810_writeb(CR_INDEX_CGA, mmio, CR12);
286 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr12);
287 	i810_writeb(CR_INDEX_CGA, mmio, CR15);
288 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr15);
289 	i810_writeb(CR_INDEX_CGA, mmio, CR16);
290 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr16);
302 	u8 __iomem *mmio = par->mmio_start_virtual;
304 	i810_writeb(CR_INDEX_CGA, mmio, CR30);
305 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr30);
306 	i810_writeb(CR_INDEX_CGA, mmio, CR31);
307 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr31);
308 	i810_writeb(CR_INDEX_CGA, mmio, CR32);
309 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr32);
310 	i810_writeb(CR_INDEX_CGA, mmio, CR33);
311 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr33);
312 	i810_writeb(CR_INDEX_CGA, mmio, CR35);
313 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr35);
314 	i810_writeb(CR_INDEX_CGA, mmio, CR39);
315 	i810_writeb(CR_DATA_CGA, mmio, par->regs.cr39);
329 	u8 __iomem *mmio = par->mmio_start_virtual;
331   	i810_writel(FW_BLC, mmio, par->watermark);
332 	tmp = i810_readl(PIXCONF, mmio);
334 	i810_writel(PIXCONF, mmio, tmp);
336 	i810_writel(OVRACT, mmio, par->ovract);
338 	i810_writeb(GR_INDEX, mmio, GR10);
339 	tmp8 = i810_readb(GR_DATA, mmio);
341 	i810_writeb(GR_INDEX, mmio, GR10);
342 	i810_writeb(GR_DATA, mmio, tmp8);
347  * @mmio: address of register space
349 static void i810_hires(u8 __iomem *mmio)
353 	i810_writeb(CR_INDEX_CGA, mmio, CR80);
354 	val = i810_readb(CR_DATA_CGA, mmio);
355 	i810_writeb(CR_INDEX_CGA, mmio, CR80);
356 	i810_writeb(CR_DATA_CGA, mmio, val | 1);
358 	i810_writel(MEM_MODE, mmio, i810_readl(MEM_MODE, mmio) | 4);
372 	u8 __iomem *mmio = par->mmio_start_virtual;
375 	i810_writeb(SR_INDEX, mmio, SR01);
376 	val = i810_readb(SR_DATA, mmio);
379 	i810_writeb(SR_INDEX, mmio, SR01);
380 	i810_writeb(SR_DATA, mmio, val);
383 	i810_writeb(CR_INDEX_CGA, mmio, CR13);
384 	i810_writeb(CR_DATA_CGA, mmio, (u8) tmp);
387 	i810_writeb(CR_INDEX_CGA, mmio, CR41);
388 	val = i810_readb(CR_DATA_CGA, mmio) & ~0x0F;
389 	i810_writeb(CR_INDEX_CGA, mmio, CR41);
390 	i810_writeb(CR_DATA_CGA, mmio, (u8) tmp | val);
402 	u8 __iomem *mmio = par->mmio_start_virtual;
406 	reg1 = i810_readl(PIXCONF, mmio) & ~(0xF0000 | 1 << 27);
407 	reg2 = i810_readw(BLTCNTL, mmio) & ~0x30;
411 	i810_writel(PIXCONF, mmio, reg1);
412 	i810_writew(BLTCNTL, mmio, reg2);
424 	u8 __iomem *mmio = par->mmio_start_virtual;
426 	i810_screen_off(mmio, OFF);
427 	i810_protect_regs(mmio, OFF);
428 	i810_dram_off(mmio, OFF);
432 	i810_dram_off(mmio, ON);
434 	i810_hires(mmio);
435 	i810_screen_off(mmio, ON);
436 	i810_protect_regs(mmio, ON);
442 			  u8 __iomem *mmio)
444 	i810_writeb(CLUT_INDEX_WRITE, mmio, regno);
445 	i810_writeb(CLUT_DATA, mmio, red);
446 	i810_writeb(CLUT_DATA, mmio, green);
447 	i810_writeb(CLUT_DATA, mmio, blue);
451 			  u8 __iomem *mmio)
453 	i810_writeb(CLUT_INDEX_READ, mmio, regno);
454 	*red = i810_readb(CLUT_DATA, mmio);
455 	*green = i810_readb(CLUT_DATA, mmio);
456 	*blue = i810_readb(CLUT_DATA, mmio);
465 	u8 __iomem *mmio = par->mmio_start_virtual;
468 	tmp2 = i810_readl(DCLK_2D, mmio);
471 	i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
474 	tmp2 = i810_readl(DCLK_1D, mmio);
477 	i810_writel(DCLK_1D, mmio, tmp1 | tmp2);
479 	i810_writel(DCLK_0DS, mmio, par->hw_state.dclk_0ds);
485 	u8 __iomem *mmio = par->mmio_start_virtual;
488 	tmp2 = i810_readl(PIXCONF, mmio);
491 	i810_writel(PIXCONF, mmio, tmp1 | tmp2);
497 	u8 __iomem *mmio = par->mmio_start_virtual;
500 		i810_writeb(CR_INDEX_CGA, mmio, CR30+i);
501 		i810_writeb(CR_DATA_CGA, mmio, *(&(par->hw_state.cr30) + i));
503 	i810_writeb(CR_INDEX_CGA, mmio, CR35);
504 	i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr35);
505 	i810_writeb(CR_INDEX_CGA, mmio, CR39);
506 	i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
507 	i810_writeb(CR_INDEX_CGA, mmio, CR41);
508 	i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
511 	i810_writeb(CR_INDEX_CGA, mmio, CR70);
514 	j = i810_readb(CR_DATA_CGA, mmio);
515 	i810_writeb(CR_INDEX_CGA, mmio, CR70);
516 	i810_writeb(CR_DATA_CGA, mmio, j | i);
518 	i810_writeb(CR_INDEX_CGA, mmio, CR80);
519 	i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr80);
520 	i810_writeb(MSR_WRITE, mmio, par->hw_state.msr);
521 	i810_writeb(SR_INDEX, mmio, SR01);
523 	j = i810_readb(SR_DATA, mmio) & 0xE0;
524 	i810_writeb(SR_INDEX, mmio, SR01);
525 	i810_writeb(SR_DATA, mmio, i | j);
531 	u8 __iomem *mmio = par->mmio_start_virtual;
534 		i810_writeb(CR_INDEX_CGA, mmio, CR00 + i);
535 		i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr00) + i));
538 		i810_writeb(CR_INDEX_CGA, mmio, CR10 + i);
539 		i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr10) + i));
546 	u8 __iomem *mmio = par->mmio_start_virtual;
548 	i810_writeb(GR_INDEX, mmio, GR10);
549 	tmp = i810_readb(GR_DATA, mmio);
552 	i810_writeb(GR_INDEX, mmio, GR10);
553 	i810_writeb(GR_DATA, mmio, tmp);
560 	u8 __iomem *mmio = par->mmio_start_virtual;
562 	tmp_word = i810_readw(BLTCNTL, mmio);
565 	i810_writew(BLTCNTL, mmio, tmp_word);
567 	i810_dram_off(mmio, OFF);
568 	i810_writel(PIXCONF, mmio, par->hw_state.pixconf);
569 	i810_dram_off(mmio, ON);
571 	tmp_word = i810_readw(HWSTAM, mmio);
574 	i810_writew(HWSTAM, mmio, tmp_word);
576 	tmp_long = i810_readl(FW_BLC, mmio);
579 	i810_writel(FW_BLC, mmio, tmp_long);
581 	i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
582 	i810_writew(IER, mmio, par->hw_state.ier);
583 	i810_writew(IMR, mmio, par->hw_state.imr);
584 	i810_writel(DPLYSTAS, mmio, par->hw_state.dplystas);
589 	u8 __iomem *mmio = par->mmio_start_virtual;
591 	i810_screen_off(mmio, OFF);
592 	i810_protect_regs(mmio, OFF);
593 	i810_dram_off(mmio, OFF);
599 	i810_dram_off(mmio, ON);
601 	i810_screen_off(mmio, ON);
602 	i810_protect_regs(mmio, ON);
612 	u8 __iomem *mmio = par->mmio_start_virtual;
615 		i810_writeb(CR_INDEX_CGA, mmio, CR30 + i);
616 		*(&(par->hw_state.cr30) + i) = i810_readb(CR_DATA_CGA, mmio);
618 	i810_writeb(CR_INDEX_CGA, mmio, CR35);
619 	par->hw_state.cr35 = i810_readb(CR_DATA_CGA, mmio);
620 	i810_writeb(CR_INDEX_CGA, mmio, CR39);
621 	par->hw_state.cr39 = i810_readb(CR_DATA_CGA, mmio);
622 	i810_writeb(CR_INDEX_CGA, mmio, CR41);
623 	par->hw_state.cr41 = i810_readb(CR_DATA_CGA, mmio);
624 	i810_writeb(CR_INDEX_CGA, mmio, CR70);
625 	par->hw_state.cr70 = i810_readb(CR_DATA_CGA, mmio);
626 	par->hw_state.msr = i810_readb(MSR_READ, mmio);
627 	i810_writeb(CR_INDEX_CGA, mmio, CR80);
628 	par->hw_state.cr80 = i810_readb(CR_DATA_CGA, mmio);
629 	i810_writeb(SR_INDEX, mmio, SR01);
630 	par->hw_state.sr01 = i810_readb(SR_DATA, mmio);
636 	u8 __iomem *mmio = par->mmio_start_virtual;
639 		i810_writeb(CR_INDEX_CGA, mmio, CR00 + i);
640 		*((&par->hw_state.cr00) + i) = i810_readb(CR_DATA_CGA, mmio);
643 		i810_writeb(CR_INDEX_CGA, mmio, CR10 + i);
644 		*((&par->hw_state.cr10) + i) = i810_readb(CR_DATA_CGA, mmio);
650 	u8 __iomem *mmio = par->mmio_start_virtual;
652 	par->hw_state.dclk_2d = i810_readl(DCLK_2D, mmio);
653 	par->hw_state.dclk_1d = i810_readl(DCLK_1D, mmio);
654 	par->hw_state.dclk_0ds = i810_readl(DCLK_0DS, mmio);
655 	par->hw_state.pixconf = i810_readl(PIXCONF, mmio);
656 	par->hw_state.fw_blc = i810_readl(FW_BLC, mmio);
657 	par->hw_state.bltcntl = i810_readw(BLTCNTL, mmio);
658 	par->hw_state.hwstam = i810_readw(HWSTAM, mmio);
659 	par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
660 	par->hw_state.ier = i810_readw(IER, mmio);
661 	par->hw_state.imr = i810_readw(IMR, mmio);
662 	par->hw_state.dplystas = i810_readl(DPLYSTAS, mmio);
767  * @mmio: address of register space
773 static void i810_enable_cursor(u8 __iomem *mmio, int mode)
777 	temp = i810_readl(PIXCONF, mmio);
781 	i810_writel(PIXCONF, mmio, temp);
823 	u8 __iomem *mmio = par->mmio_start_virtual;
828 	temp = i810_readb(PIXCONF1, mmio);
829 	i810_writeb(PIXCONF1, mmio, temp | EXTENDED_PALETTE);
831 	i810_write_dac(4, red, green, blue, mmio);
833 	i810_writeb(PIXCONF1, mmio, temp);
836 	temp = i810_readb(PIXCONF1, mmio);
837 	i810_writeb(PIXCONF1, mmio, temp | EXTENDED_PALETTE);
839 	i810_write_dac(5, red, green, blue, mmio);
841 	i810_writeb(PIXCONF1, mmio, temp);
853 	u8 __iomem *mmio = par->mmio_start_virtual;
855 	i810_enable_cursor(mmio, OFF);
856 	i810_writel(CURBASE, mmio, par->cursor_heap.physical);
857 	i810_writew(CURCNTR, mmio, COORD_ACTIVE | CURSOR_MODE_64_XOR);
1204 	u8 __iomem *mmio = par->mmio_start_virtual;
1213 	temp = i810_readb(PIXCONF1, mmio);
1214 	i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
1218 		i810_read_dac(regno * 8, red, green, blue, mmio);
1224 		i810_read_dac(regno * 8, red, &tmp, blue, mmio);
1225 		i810_read_dac(regno * 4, &tmp, green, &tmp, mmio);
1228 		i810_read_dac(regno, red, green, blue, mmio);
1231 	i810_writeb(PIXCONF1, mmio, temp);
1287 	u8 __iomem *mmio = par->mmio_start_virtual;
1303 	temp = i810_readb(PIXCONF1, mmio);
1304 	i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
1310 				       (u8) green, (u8) blue, mmio);
1319 					       (u8) blue, mmio);
1321 		i810_read_dac((u8) (regno*4), &r, &g, &b, mmio);
1324 				       b, mmio);
1327 			       (u8) blue, mmio);
1330 	i810_writeb(PIXCONF1, mmio, temp);
1393 	u8 __iomem *mmio = par->mmio_start_virtual;
1396 	pwr = i810_readl(PWR_CLKC, mmio);
1428 	i810_screen_off(mmio, scr_off);
1429 	i810_writel(HVSYNC, mmio, mode);
1430 	i810_writel(PWR_CLKC, mmio, pwr);
1482 	u8 __iomem *mmio = par->mmio_start_virtual;
1490 	if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) {
1495 	i810_enable_cursor(mmio, OFF);
1502 		i810_writel(CURPOS, mmio, tmp);
1541 		i810_enable_cursor(mmio, ON);
1821 	u8 __iomem *mmio = par->mmio_start_virtual;
1831 		i810_writel(HVSYNC, mmio, 0);
1832 		i810_writel(PWR_CLKC, mmio, 3);
1884 		printk("i810fb_init: cannot request mmio region\n");
1892 		printk("i810fb_init: cannot remap mmio region\n");