Lines Matching defs:Data

519 	__u16 Data;
555 Data = 0x0;
556 status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
561 Data |= 0x80;
562 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
568 Data &= ~0x80;
569 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
576 Data = 0x0;
578 &Data);
583 Data |= 0x08; /* Driver done bit */
584 Data |= 0x20; /* rx_disable */
586 mos7840_port->ControlRegOffset, Data);
596 Data = 0x00;
597 status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
603 Data = 0x00;
604 status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
610 Data = 0xcf;
611 status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
617 Data = 0x03;
618 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
619 mos7840_port->shadowLCR = Data;
621 Data = 0x0b;
622 status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
623 mos7840_port->shadowMCR = Data;
625 Data = 0x00;
626 status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
627 mos7840_port->shadowLCR = Data;
629 Data |= SERIAL_LCR_DLAB; /* data latch enable in LCR 0x80 */
630 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
632 Data = 0x0c;
633 status = mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
635 Data = 0x0;
636 status = mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
638 Data = 0x00;
639 status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
641 Data = Data & ~SERIAL_LCR_DLAB;
642 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
643 mos7840_port->shadowLCR = Data;
646 Data = 0x0;
647 status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
649 Data = Data | 0x0c;
650 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
652 Data = Data & ~0x0c;
653 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
655 Data = 0x0c;
656 status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
659 Data = 0x0;
661 &Data);
662 Data = Data & ~0x20;
664 Data);
667 Data = 0x0;
669 &Data);
670 Data = Data | 0x10;
672 Data);
763 __u16 Data;
779 Data = 0x0;
780 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
782 Data = 0x00;
783 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
855 /* __u16 Data; */
1104 __u16 Data;
1113 Data = 0x2b;
1114 mos7840_port->shadowMCR = Data;
1116 Data);
1126 Data = 0xb;
1127 mos7840_port->shadowMCR = Data;
1129 Data);
1140 Data = 0x0;
1144 &Data);
1149 Data = (Data & 0x8f) | clk_sel_val;
1151 Data);
1163 Data = mos7840_port->shadowLCR | SERIAL_LCR_DLAB;
1164 mos7840_port->shadowLCR = Data;
1165 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1168 Data = (unsigned char)(divisor & 0xff);
1169 dev_dbg(&port->dev, "set_serial_baud Value to write DLL is %x\n", Data);
1170 mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
1172 Data = (unsigned char)((divisor & 0xff00) >> 8);
1173 dev_dbg(&port->dev, "set_serial_baud Value to write DLM is %x\n", Data);
1174 mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
1177 Data = mos7840_port->shadowLCR & ~SERIAL_LCR_DLAB;
1178 mos7840_port->shadowLCR = Data;
1179 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1202 __u16 Data;
1264 Data = 0x00;
1265 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1267 Data = 0x00;
1268 mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
1270 Data = 0xcf;
1271 mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
1274 Data = mos7840_port->shadowLCR;
1276 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1278 Data = 0x00b;
1279 mos7840_port->shadowMCR = Data;
1280 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1281 Data = 0x00b;
1282 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1295 Data = mos7840_port->shadowMCR;
1296 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1311 Data = 0x0c;
1312 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1540 __u16 Data;
1586 mos7840_port->ControlRegOffset, &Data);
1591 dev_dbg(&port->dev, "ControlReg Reading success val is %x, status%d\n", Data, status);
1592 Data |= 0x08; /* setting driver done bit */
1593 Data |= 0x04; /* sp1_bit to have cts change reflect in
1596 /* Data |= 0x20; //rx_disable bit */
1598 mos7840_port->ControlRegOffset, Data);
1607 Data = 0x01;
1609 (__u16) (mos7840_port->DcrRegOffset + 0), Data);
1616 Data = 0x05;
1618 (__u16) (mos7840_port->DcrRegOffset + 1), Data);
1625 Data = 0x24;
1627 (__u16) (mos7840_port->DcrRegOffset + 2), Data);
1635 Data = 0x0;
1636 status = mos7840_set_reg_sync(port, CLK_START_VALUE_REGISTER, Data);
1643 Data = 0x20;
1644 status = mos7840_set_reg_sync(port, CLK_MULTI_REGISTER, Data);
1652 Data = 0x00;
1653 status = mos7840_set_uart_reg(port, SCRATCH_PAD_REGISTER, Data);
1662 Data = 0xff;
1665 ((__u16)mos7840_port->port_num)), Data);
1674 Data = 0xff;
1677 ((__u16)mos7840_port->port_num) - 0x1), Data);