Lines Matching defs:ohci
38 * PRECONDITION: ohci lock held, irqs blocked.
41 finish_urb(struct ohci_hcd *ohci, struct urb *urb, int status)
42 __releases(ohci->lock)
43 __acquires(ohci->lock)
45 struct device *dev = ohci_to_hcd(ohci)->self.controller;
52 urb_free_priv (ohci, urb->hcpriv);
59 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--;
60 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
61 if (quirk_amdiso(ohci))
63 if (quirk_amdprefetch(ohci))
68 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--;
73 usb_hcd_unlink_urb_from_ep(ohci_to_hcd(ohci), urb);
74 spin_unlock (&ohci->lock);
75 usb_hcd_giveback_urb(ohci_to_hcd(ohci), urb, status);
76 spin_lock (&ohci->lock);
79 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0
80 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0) {
81 ohci->hc_control &= ~(OHCI_CTRL_PLE|OHCI_CTRL_IE);
82 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
109 static int balance (struct ohci_hcd *ohci, int interval, int load)
121 if (branch < 0 || ohci->load [branch] > ohci->load [i]) {
126 if ((ohci->load [j] + load) > 900)
143 static void periodic_link (struct ohci_hcd *ohci, struct ed *ed)
147 ohci_dbg(ohci, "link %sed %p branch %d [%dus.], interval %d\n",
148 (ed->hwINFO & cpu_to_hc32 (ohci, ED_ISO)) ? "iso " : "",
152 struct ed **prev = &ohci->periodic [i];
153 __hc32 *prev_p = &ohci->hcca->int_table [i];
173 *prev_p = cpu_to_hc32(ohci, ed->dma);
176 ohci->load [i] += ed->load;
178 ohci_to_hcd(ohci)->self.bandwidth_allocated += ed->load / ed->interval;
183 static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed)
198 * periodic schedule encodes a tree like figure 3-5 in the ohci
204 if (ohci->ed_controltail == NULL) {
205 WARN_ON (ohci->hc_control & OHCI_CTRL_CLE);
206 ohci_writel (ohci, ed->dma,
207 &ohci->regs->ed_controlhead);
209 ohci->ed_controltail->ed_next = ed;
210 ohci->ed_controltail->hwNextED = cpu_to_hc32 (ohci,
213 ed->ed_prev = ohci->ed_controltail;
214 if (!ohci->ed_controltail && !ohci->ed_rm_list) {
216 ohci->hc_control |= OHCI_CTRL_CLE;
217 ohci_writel (ohci, 0, &ohci->regs->ed_controlcurrent);
218 ohci_writel (ohci, ohci->hc_control,
219 &ohci->regs->control);
221 ohci->ed_controltail = ed;
225 if (ohci->ed_bulktail == NULL) {
226 WARN_ON (ohci->hc_control & OHCI_CTRL_BLE);
227 ohci_writel (ohci, ed->dma, &ohci->regs->ed_bulkhead);
229 ohci->ed_bulktail->ed_next = ed;
230 ohci->ed_bulktail->hwNextED = cpu_to_hc32 (ohci,
233 ed->ed_prev = ohci->ed_bulktail;
234 if (!ohci->ed_bulktail && !ohci->ed_rm_list) {
236 ohci->hc_control |= OHCI_CTRL_BLE;
237 ohci_writel (ohci, 0, &ohci->regs->ed_bulkcurrent);
238 ohci_writel (ohci, ohci->hc_control,
239 &ohci->regs->control);
241 ohci->ed_bulktail = ed;
247 branch = balance (ohci, ed->interval, ed->load);
249 ohci_dbg (ohci,
256 periodic_link (ohci, ed);
270 static void periodic_unlink (struct ohci_hcd *ohci, struct ed *ed)
276 struct ed **prev = &ohci->periodic [i];
277 __hc32 *prev_p = &ohci->hcca->int_table [i];
287 ohci->load [i] -= ed->load;
289 ohci_to_hcd(ohci)->self.bandwidth_allocated -= ed->load / ed->interval;
291 ohci_dbg(ohci, "unlink %sed %p branch %d [%dus.], interval %d\n",
292 (ed->hwINFO & cpu_to_hc32 (ohci, ED_ISO)) ? "iso " : "",
317 static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed)
319 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
338 ohci->hc_control &= ~OHCI_CTRL_CLE;
339 ohci_writel (ohci, ohci->hc_control,
340 &ohci->regs->control);
343 ohci_writel (ohci,
344 hc32_to_cpup (ohci, &ed->hwNextED),
345 &ohci->regs->ed_controlhead);
351 if (ohci->ed_controltail == ed) {
352 ohci->ed_controltail = ed->ed_prev;
353 if (ohci->ed_controltail)
354 ohci->ed_controltail->ed_next = NULL;
364 ohci->hc_control &= ~OHCI_CTRL_BLE;
365 ohci_writel (ohci, ohci->hc_control,
366 &ohci->regs->control);
369 ohci_writel (ohci,
370 hc32_to_cpup (ohci, &ed->hwNextED),
371 &ohci->regs->ed_bulkhead);
377 if (ohci->ed_bulktail == ed) {
378 ohci->ed_bulktail = ed->ed_prev;
379 if (ohci->ed_bulktail)
380 ohci->ed_bulktail->ed_next = NULL;
389 periodic_unlink (ohci, ed);
401 struct ohci_hcd *ohci,
410 spin_lock_irqsave (&ohci->lock, flags);
418 ed = ed_alloc (ohci, GFP_ATOMIC);
425 td = td_alloc (ohci, GFP_ATOMIC);
428 ed_free (ohci, ed);
433 ed->hwTailP = cpu_to_hc32 (ohci, td->td_dma);
466 ed->hwINFO = cpu_to_hc32(ohci, info);
472 spin_unlock_irqrestore (&ohci->lock, flags);
484 static void start_ed_unlink (struct ohci_hcd *ohci, struct ed *ed)
486 ed->hwINFO |= cpu_to_hc32 (ohci, ED_DEQUEUE);
487 ed_deschedule (ohci, ed);
490 ed->ed_next = ohci->ed_rm_list;
492 ohci->ed_rm_list = ed;
495 ohci_writel (ohci, OHCI_INTR_SF, &ohci->regs->intrstatus);
496 ohci_writel (ohci, OHCI_INTR_SF, &ohci->regs->intrenable);
498 (void) ohci_readl (ohci, &ohci->regs->control);
505 ed->tick = ohci_frame_no(ohci) + 1;
516 td_fill (struct ohci_hcd *ohci, u32 info,
557 td->hwINFO = cpu_to_hc32 (ohci, info);
559 td->hwCBP = cpu_to_hc32 (ohci, data & 0xFFFFF000);
560 *ohci_hwPSWp(ohci, td, 0) = cpu_to_hc16 (ohci,
563 td->hwCBP = cpu_to_hc32 (ohci, data);
566 td->hwBE = cpu_to_hc32 (ohci, data + len - 1);
569 td->hwNextTD = cpu_to_hc32 (ohci, td_pt->td_dma);
576 td->td_hash = ohci->td_hash [hash];
577 ohci->td_hash [hash] = td;
592 struct ohci_hcd *ohci,
596 struct device *dev = ohci_to_hcd(ohci)->self.controller;
613 urb_priv->ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_C);
616 list_add (&urb_priv->pending, &ohci->pending);
648 periodic = ohci_to_hcd(ohci)->self.bandwidth_int_reqs++ == 0
649 && ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0;
664 td_fill(ohci, info, data, n, urb, cnt);
681 td_fill (ohci, info, 0, 0, urb, cnt);
687 ohci_writel (ohci, OHCI_BLF, &ohci->regs->cmdstatus);
696 td_fill (ohci, info, urb->setup_dma, 8, urb, cnt++);
701 td_fill (ohci, info, data, data_len, urb, cnt++);
706 td_fill (ohci, info, data, 0, urb, cnt++);
709 ohci_writel (ohci, OHCI_CLF, &ohci->regs->cmdstatus);
726 td_fill (ohci, TD_CC | TD_ISO | frame,
730 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
731 if (quirk_amdiso(ohci))
733 if (quirk_amdprefetch(ohci))
736 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0
737 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0;
744 ohci->hc_control |= OHCI_CTRL_PLE|OHCI_CTRL_IE;
745 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
756 static int td_done(struct ohci_hcd *ohci, struct urb *urb, struct td *td)
758 u32 tdINFO = hc32_to_cpup (ohci, &td->hwINFO);
766 u16 tdPSW = ohci_hwPSW(ohci, td, 0);
790 ohci_dbg(ohci,
800 u32 tdBE = hc32_to_cpup (ohci, &td->hwBE);
817 hc32_to_cpup (ohci, &td->hwCBP)
822 ohci_dbg(ohci,
833 static void ed_halted(struct ohci_hcd *ohci, struct td *td, int cc)
839 __hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ohci, ED_C);
844 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
846 ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H);
888 ohci_dbg (ohci,
893 hc32_to_cpu (ohci, td->hwINFO),
899 static void add_to_done_list(struct ohci_hcd *ohci, struct td *td)
917 if (ohci->dl_end)
918 ohci->dl_end->next_dl_td = td_prev;
920 ohci->dl_start = td_prev;
926 ohci->dl_end = td->next_dl_td = td;
935 static void update_done_list(struct ohci_hcd *ohci)
940 td_dma = hc32_to_cpup (ohci, &ohci->hcca->done_head);
941 ohci->hcca->done_head = 0;
950 td = dma_to_td (ohci, td_dma);
952 ohci_err (ohci, "bad entry %8x\n", td_dma);
956 td->hwINFO |= cpu_to_hc32 (ohci, TD_DONE);
957 cc = TD_CC_GET (hc32_to_cpup (ohci, &td->hwINFO));
964 && (td->ed->hwHeadP & cpu_to_hc32 (ohci, ED_H)))
965 ed_halted(ohci, td, cc);
967 td_dma = hc32_to_cpup (ohci, &td->hwNextTD);
968 add_to_done_list(ohci, td);
975 static void finish_unlinks(struct ohci_hcd *ohci)
977 unsigned tick = ohci_frame_no(ohci);
981 for (last = &ohci->ed_rm_list, ed = *last; ed != NULL; ed = *last) {
989 if (likely(ohci->rh_state == OHCI_RH_RUNNING) &&
1002 head = hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK;
1004 ohci->rh_state == OHCI_RH_RUNNING)
1013 ed->hwHeadP &= ~cpu_to_hc32(ohci, ED_H);
1016 ed->hwINFO &= ~cpu_to_hc32(ohci, ED_SKIP | ED_DEQUEUE);
1054 savebits = *prev & ~cpu_to_hc32 (ohci, TD_MASK);
1062 tdINFO = hc32_to_cpup(ohci, &td->hwINFO);
1064 ed->hwHeadP &= ~cpu_to_hc32(ohci, ED_C);
1066 ed->hwHeadP |= cpu_to_hc32(ohci, ED_C);
1069 td_done (ohci, urb, td);
1075 finish_urb(ohci, urb, 0);
1090 } else if (ohci->rh_state == OHCI_RH_RUNNING) {
1091 ed_schedule(ohci, ed);
1093 ed->ed_next = ohci->ed_rm_list;
1094 ohci->ed_rm_list = ed;
1096 if (last == &ohci->ed_rm_list)
1105 if (ohci->rh_state == OHCI_RH_RUNNING && !ohci->ed_rm_list) {
1108 if (ohci->ed_controltail) {
1110 if (quirk_zfmicro(ohci))
1112 if (!(ohci->hc_control & OHCI_CTRL_CLE)) {
1114 ohci_writel (ohci, 0,
1115 &ohci->regs->ed_controlcurrent);
1118 if (ohci->ed_bulktail) {
1120 if (quirk_zfmicro(ohci))
1122 if (!(ohci->hc_control & OHCI_CTRL_BLE)) {
1124 ohci_writel (ohci, 0,
1125 &ohci->regs->ed_bulkcurrent);
1131 ohci->hc_control |= control;
1132 if (quirk_zfmicro(ohci))
1134 ohci_writel (ohci, ohci->hc_control,
1135 &ohci->regs->control);
1138 if (quirk_zfmicro(ohci))
1140 ohci_writel (ohci, command, &ohci->regs->cmdstatus);
1150 static void takeback_td(struct ohci_hcd *ohci, struct td *td)
1158 status = td_done(ohci, urb, td);
1163 finish_urb(ohci, urb, status);
1168 start_ed_unlink(ohci, ed);
1171 } else if ((ed->hwINFO & cpu_to_hc32(ohci, ED_SKIP | ED_DEQUEUE))
1172 == cpu_to_hc32(ohci, ED_SKIP)) {
1174 if (!(td->hwINFO & cpu_to_hc32(ohci, TD_DONE))) {
1175 ed->hwINFO &= ~cpu_to_hc32(ohci, ED_SKIP);
1179 ohci_writel(ohci, OHCI_CLF,
1180 &ohci->regs->cmdstatus);
1183 ohci_writel(ohci, OHCI_BLF,
1184 &ohci->regs->cmdstatus);
1198 static void process_done_list(struct ohci_hcd *ohci)
1202 while (ohci->dl_start) {
1203 td = ohci->dl_start;
1204 if (td == ohci->dl_end)
1205 ohci->dl_start = ohci->dl_end = NULL;
1207 ohci->dl_start = td->next_dl_td;
1209 takeback_td(ohci, td);
1217 static void ohci_work(struct ohci_hcd *ohci)
1219 if (ohci->working) {
1220 ohci->restart_work = 1;
1223 ohci->working = 1;
1226 process_done_list(ohci);
1227 if (ohci->ed_rm_list)
1228 finish_unlinks(ohci);
1230 if (ohci->restart_work) {
1231 ohci->restart_work = 0;
1234 ohci->working = 0;