Lines Matching refs:HCFG
181 /* Restore GUSBCFG and HCFG/DCFG */
185 dwc2_writel(hsotg, hr->hcfg, HCFG);
625 addr = hsotg->regs + HCFG;
626 dev_dbg(hsotg->dev, "HCFG @0x%08lX : 0x%08X\n",
627 (unsigned long)addr, dwc2_readl(hsotg, HCFG));
953 * Initializes the FSLSPClkSel field of the HCFG register depending on the
971 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
972 hcfg = dwc2_readl(hsotg, HCFG);
975 dwc2_writel(hsotg, hcfg, HCFG);
1020 * Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also