Lines Matching refs:ci
40 #include "ci.h"
100 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
105 ci->hw_bank.regmap[i] =
106 (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
110 ci->hw_bank.regmap[i] = ci->hw_bank.op +
118 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
120 int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
124 rev = hw_read_id_reg(ci, ID_ID, REVISION)
137 * @ci: the controller
141 u32 hw_read_intr_enable(struct ci_hdrc *ci)
143 return hw_read(ci, OP_USBINTR, ~0);
149 * @ci: the controller
153 u32 hw_read_intr_status(struct ci_hdrc *ci)
155 return hw_read(ci, OP_USBSTS, ~0);
160 * @ci: the controller
165 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
172 hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
179 * @ci: the controller
183 u8 hw_port_test_get(struct ci_hdrc *ci)
185 return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
200 static void ci_hdrc_enter_lpm_common(struct ci_hdrc *ci, bool enable)
202 enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
203 bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
206 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
207 PORTSC_PHCD(ci->hw_bank.lpm));
209 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
213 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
215 return ci->platdata->enter_lpm(ci, enable);
218 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
223 ci->hw_bank.abs = base;
225 ci->hw_bank.cap = ci->hw_bank.abs;
226 ci->hw_bank.cap += ci->platdata->capoffset;
227 ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
229 hw_alloc_regmap(ci, false);
230 reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
232 ci->hw_bank.lpm = reg;
234 hw_alloc_regmap(ci, !!reg);
235 ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
236 ci->hw_bank.size += OP_LAST;
237 ci->hw_bank.size /= sizeof(u32);
239 reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
241 ci->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
243 if (ci->hw_ep_max > ENDPT_MAX)
246 ci_hdrc_enter_lpm(ci, false);
249 hw_write(ci, OP_USBINTR, 0xffffffff, 0);
252 hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
254 ci->rev = ci_get_revision(ci);
256 dev_dbg(ci->dev,
258 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
269 void hw_phymode_configure(struct ci_hdrc *ci)
273 switch (ci->platdata->phy_mode) {
299 if (ci->hw_bank.lpm) {
300 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
302 hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
304 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
306 hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
314 * @ci: the controller
318 static int _ci_usb_phy_init(struct ci_hdrc *ci)
322 if (ci->phy) {
323 ret = phy_init(ci->phy);
327 ret = phy_power_on(ci->phy);
329 phy_exit(ci->phy);
333 ret = usb_phy_init(ci->usb_phy);
342 * @ci: the controller
344 static void ci_usb_phy_exit(struct ci_hdrc *ci)
346 if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
349 if (ci->phy) {
350 phy_power_off(ci->phy);
351 phy_exit(ci->phy);
353 usb_phy_shutdown(ci->usb_phy);
359 * @ci: the controller
363 static int ci_usb_phy_init(struct ci_hdrc *ci)
367 if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
370 switch (ci->platdata->phy_mode) {
374 ret = _ci_usb_phy_init(ci);
379 hw_phymode_configure(ci);
383 hw_phymode_configure(ci);
384 ret = _ci_usb_phy_init(ci);
389 ret = _ci_usb_phy_init(ci);
400 * @ci: the controller
403 void ci_platform_configure(struct ci_hdrc *ci)
407 is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
408 is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
411 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
413 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
414 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
419 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
421 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
422 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
426 if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
427 if (ci->hw_bank.lpm)
428 hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
430 hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
433 if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
434 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
436 hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
438 if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
439 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
440 ci->platdata->ahb_burst_config);
443 if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
444 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
445 hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
446 ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
448 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
449 hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
450 ci->platdata->rx_burst_size);
456 * @ci: the controller
460 static int hw_controller_reset(struct ci_hdrc *ci)
464 hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
465 while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
476 * @ci: the controller
480 int hw_device_reset(struct ci_hdrc *ci)
485 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
486 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
488 ret = hw_controller_reset(ci);
490 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
494 if (ci->platdata->notify_event) {
495 ret = ci->platdata->notify_event(ci,
502 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
503 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
505 hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
507 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
508 dev_err(ci->dev, "cannot enter in %s device mode\n",
509 ci_role(ci)->name);
510 dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
514 ci_platform_configure(ci);
521 struct ci_hdrc *ci = data;
525 if (ci->in_lpm) {
530 if (ci->wakeup_int)
534 ci->wakeup_int = true;
535 pm_runtime_get(ci->dev);
539 if (ci->is_otg) {
540 otgsc = hw_read_otgsc(ci, ~0);
541 if (ci_otg_is_fsm_mode(ci)) {
542 ret = ci_otg_fsm_irq(ci);
552 if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
553 ci->id_event = true;
555 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
556 ci_otg_queue_work(ci);
564 if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
565 ci->b_sess_valid_event = true;
567 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
568 ci_otg_queue_work(ci);
573 if (ci->role != CI_ROLE_END)
574 ret = ci_role(ci)->irq(ci);
579 static void ci_irq(struct ci_hdrc *ci)
584 ci_irq_handler(ci->irq, ci);
592 struct ci_hdrc *ci = cbl->ci;
597 ci_irq(ci);
603 struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
607 spin_lock_irqsave(&ci->lock, flags);
608 role = ci_role_to_usb_role(ci);
609 spin_unlock_irqrestore(&ci->lock, flags);
617 struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
621 cable = &ci->platdata->id_extcon;
624 cable = &ci->platdata->vbus_extcon;
628 cable = &ci->platdata->id_extcon;
631 cable = &ci->platdata->vbus_extcon;
635 cable = &ci->platdata->id_extcon;
638 cable = &ci->platdata->vbus_extcon;
643 ci_irq(ci);
647 static enum ci_role ci_get_role(struct ci_hdrc *ci)
651 if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
652 if (ci->is_otg) {
653 role = ci_otg_role(ci);
654 hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
664 role = ci->roles[CI_ROLE_HOST] ? CI_ROLE_HOST
829 static int ci_extcon_register(struct ci_hdrc *ci)
834 id = &ci->platdata->id_extcon;
835 id->ci = ci;
837 ret = devm_extcon_register_notifier(ci->dev, id->edev,
840 dev_err(ci->dev, "register ID failed\n");
845 vbus = &ci->platdata->vbus_extcon;
846 vbus->ci = ci;
848 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
851 dev_err(ci->dev, "register VBUS failed\n");
861 struct ci_hdrc *ci = container_of(work, struct ci_hdrc, power_lost_work);
864 disable_irq_nosync(ci->irq);
865 pm_runtime_get_sync(ci->dev);
866 if (!ci_otg_is_fsm_mode(ci)) {
867 role = ci_get_role(ci);
869 if (ci->role != role) {
870 ci_handle_id_switch(ci);
872 if (ci->is_otg && hw_read_otgsc(ci, OTGSC_BSV))
873 usb_gadget_vbus_connect(&ci->gadget);
876 pm_runtime_put_sync(ci->dev);
877 enable_irq(ci->irq);
940 * This function should be called after ci core device has created.
942 * @pdev: the platform device of ci core.
948 struct ci_hdrc *ci = platform_get_drvdata(pdev);
950 if (!ci)
952 if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])
954 else if (ci->roles[CI_ROLE_HOST])
956 else if (ci->roles[CI_ROLE_GADGET])
963 static inline void ci_role_destroy(struct ci_hdrc *ci)
965 ci_hdrc_gadget_destroy(ci);
966 ci_hdrc_host_destroy(ci);
967 if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
968 ci_hdrc_otg_destroy(ci);
971 static void ci_get_otg_capable(struct ci_hdrc *ci)
973 if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
974 ci->is_otg = false;
976 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
979 if (ci->is_otg) {
980 dev_dbg(ci->dev, "It is OTG capable controller\n");
982 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
990 struct ci_hdrc *ci = dev_get_drvdata(dev);
992 if (ci->role != CI_ROLE_END)
993 return sprintf(buf, "%s\n", ci_role(ci)->name);
1001 struct ci_hdrc *ci = dev_get_drvdata(dev);
1005 if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
1011 if (!strncmp(buf, ci->roles[role]->name,
1012 strlen(ci->roles[role]->name)))
1018 mutex_lock(&ci->mutex);
1020 if (role == ci->role) {
1021 mutex_unlock(&ci->mutex);
1026 disable_irq(ci->irq);
1027 ci_role_stop(ci);
1028 ret = ci_role_start(ci, role);
1029 if (!ret && ci->role == CI_ROLE_GADGET)
1030 ci_handle_vbus_change(ci);
1031 enable_irq(ci->irq);
1033 mutex_unlock(&ci->mutex);
1043 ATTRIBUTE_GROUPS(ci);
1048 struct ci_hdrc *ci;
1063 ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
1064 if (!ci)
1067 spin_lock_init(&ci->lock);
1068 mutex_init(&ci->mutex);
1069 INIT_WORK(&ci->power_lost_work, ci_power_lost_work);
1071 ci->dev = dev;
1072 ci->platdata = dev_get_platdata(dev);
1073 ci->imx28_write_fix = !!(ci->platdata->flags &
1075 ci->supports_runtime_pm = !!(ci->platdata->flags &
1077 ci->has_portsc_pec_bug = !!(ci->platdata->flags &
1079 platform_set_drvdata(pdev, ci);
1081 ret = hw_device_init(ci, base);
1087 ret = ci_ulpi_init(ci);
1091 if (ci->platdata->phy) {
1092 ci->phy = ci->platdata->phy;
1093 } else if (ci->platdata->usb_phy) {
1094 ci->usb_phy = ci->platdata->usb_phy;
1097 ci->phy = devm_phy_get(dev->parent, "usb-phy");
1099 if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1102 } else if (IS_ERR(ci->phy)) {
1103 ci->phy = NULL;
1107 if (!ci->phy) {
1108 ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1111 if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1114 } else if (IS_ERR(ci->usb_phy)) {
1115 ci->usb_phy = NULL;
1120 if (!ci->phy && !ci->usb_phy) {
1121 ci->usb_phy = devm_usb_get_phy(dev->parent,
1124 if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1127 } else if (IS_ERR(ci->usb_phy)) {
1128 ci->usb_phy = NULL;
1133 if (!ci->phy && !ci->usb_phy) {
1139 ret = ci_usb_phy_init(ci);
1145 ci->hw_bank.phys = res->start;
1147 ci->irq = platform_get_irq(pdev, 0);
1148 if (ci->irq < 0) {
1149 ret = ci->irq;
1153 ci_get_otg_capable(ci);
1155 dr_mode = ci->platdata->dr_mode;
1158 ret = ci_hdrc_host_init(ci);
1168 ret = ci_hdrc_gadget_init(ci);
1177 if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1183 if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1184 ret = ci_hdrc_otg_init(ci);
1192 ci_role_switch.driver_data = ci;
1193 ci->role_switch = usb_role_switch_register(dev,
1195 if (IS_ERR(ci->role_switch)) {
1196 ret = PTR_ERR(ci->role_switch);
1201 ci->role = ci_get_role(ci);
1202 if (!ci_otg_is_fsm_mode(ci)) {
1204 if (ci->role == CI_ROLE_GADGET) {
1206 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1207 ci_handle_vbus_change(ci);
1210 ret = ci_role_start(ci, ci->role);
1213 ci_role(ci)->name);
1218 ret = devm_request_irq(dev, ci->irq, ci_irq_handler, IRQF_SHARED,
1219 ci->platdata->name, ci);
1223 ret = ci_extcon_register(ci);
1227 if (ci->supports_runtime_pm) {
1231 pm_runtime_mark_last_busy(ci->dev);
1235 if (ci_otg_is_fsm_mode(ci))
1236 ci_hdrc_otg_fsm_start(ci);
1239 dbg_create_files(ci);
1244 if (ci->role_switch)
1245 usb_role_switch_unregister(ci->role_switch);
1247 if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1248 ci_hdrc_otg_destroy(ci);
1250 ci_hdrc_gadget_destroy(ci);
1252 ci_hdrc_host_destroy(ci);
1254 ci_usb_phy_exit(ci);
1256 ci_ulpi_exit(ci);
1263 struct ci_hdrc *ci = platform_get_drvdata(pdev);
1265 if (ci->role_switch)
1266 usb_role_switch_unregister(ci->role_switch);
1268 if (ci->supports_runtime_pm) {
1274 dbg_remove_files(ci);
1275 ci_role_destroy(ci);
1276 ci_hdrc_enter_lpm(ci, true);
1277 ci_usb_phy_exit(ci);
1278 ci_ulpi_exit(ci);
1283 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1285 if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1286 !hw_read_otgsc(ci, OTGSC_ID)) {
1287 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1289 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1295 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1297 if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1298 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1299 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1300 ci->fsm.a_srp_det = 1;
1301 ci->fsm.a_bus_drop = 0;
1303 ci->fsm.id = 1;
1305 ci_otg_queue_work(ci);
1309 static void ci_controller_suspend(struct ci_hdrc *ci)
1311 disable_irq(ci->irq);
1312 ci_hdrc_enter_lpm(ci, true);
1313 if (ci->platdata->phy_clkgate_delay_us)
1314 usleep_range(ci->platdata->phy_clkgate_delay_us,
1315 ci->platdata->phy_clkgate_delay_us + 50);
1316 usb_phy_set_suspend(ci->usb_phy, 1);
1317 ci->in_lpm = true;
1318 enable_irq(ci->irq);
1327 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1330 u32 otgsc = hw_read_otgsc(ci, ~0);
1332 cable_id = &ci->platdata->id_extcon;
1333 cable_vbus = &ci->platdata->vbus_extcon;
1335 if ((!IS_ERR(cable_id->edev) || ci->role_switch)
1336 && ci->is_otg &&
1338 ci_irq(ci);
1340 if ((!IS_ERR(cable_vbus->edev) || ci->role_switch)
1341 && ci->is_otg &&
1343 ci_irq(ci);
1348 struct ci_hdrc *ci = dev_get_drvdata(dev);
1353 if (!ci->in_lpm) {
1358 ci_hdrc_enter_lpm(ci, false);
1360 ret = ci_ulpi_resume(ci);
1364 if (ci->usb_phy) {
1365 usb_phy_set_suspend(ci->usb_phy, 0);
1366 usb_phy_set_wakeup(ci->usb_phy, false);
1370 ci->in_lpm = false;
1371 if (ci->wakeup_int) {
1372 ci->wakeup_int = false;
1373 pm_runtime_mark_last_busy(ci->dev);
1374 pm_runtime_put_autosuspend(ci->dev);
1375 enable_irq(ci->irq);
1376 if (ci_otg_is_fsm_mode(ci))
1377 ci_otg_fsm_wakeup_by_srp(ci);
1378 ci_extcon_wakeup_int(ci);
1387 struct ci_hdrc *ci = dev_get_drvdata(dev);
1389 if (ci->wq)
1390 flush_workqueue(ci->wq);
1397 if (ci->in_lpm)
1400 if (ci->in_lpm) {
1406 if (ci->role != CI_ROLE_END && ci_role(ci)->suspend)
1407 ci_role(ci)->suspend(ci);
1410 if (ci_otg_is_fsm_mode(ci))
1411 ci_otg_fsm_suspend_for_srp(ci);
1413 usb_phy_set_wakeup(ci->usb_phy, true);
1414 enable_irq_wake(ci->irq);
1417 ci_controller_suspend(ci);
1424 struct ci_hdrc *ci = dev_get_drvdata(dev);
1433 power_lost = !hw_read(ci, OP_ENDPTLISTADDR, ~0);
1436 disable_irq_wake(ci->irq);
1444 ci_usb_phy_exit(ci);
1445 ci_usb_phy_init(ci);
1449 if (ci->role != CI_ROLE_END && ci_role(ci)->resume)
1450 ci_role(ci)->resume(ci, power_lost);
1453 queue_work(system_freezable_wq, &ci->power_lost_work);
1455 if (ci->supports_runtime_pm) {
1467 struct ci_hdrc *ci = dev_get_drvdata(dev);
1471 if (ci->in_lpm) {
1476 if (ci_otg_is_fsm_mode(ci))
1477 ci_otg_fsm_suspend_for_srp(ci);
1479 usb_phy_set_wakeup(ci->usb_phy, true);
1480 ci_controller_suspend(ci);