drivers/tty/synclink_gt.c

396 	wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
398 	wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
402 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr);
1321 	value = rd_reg16(info, TCR);
2029 	while (rd_reg16(info, SSR) & IRQ_RXDATA) {
2030 		reg = rd_reg16(info, RDR);
2059 	unsigned short status = rd_reg16(info, SSR);
2202 		unsigned short val = rd_reg16(info, TCR);
2633 			wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);
2684 		unsigned short val = rd_reg16(info, SCR);
2750 				(unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE));
2780 	val = rd_reg16(info, TCR);
3749 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr)
3803 	wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));
3851 	val = rd_reg16(info, RCR) & ~BIT1;          /* clear enable bit */
3876 	val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3885 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));
3893 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));
3909 	wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1));
3919 			 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2));
3962 	val = rd_reg16(info, TCR) & ~BIT1;          /* clear enable bit */
4325 		wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | val));
4373 	tcr = rd_reg16(info, TCR);
4409 	unsigned short status = rd_reg16(info, SSR);
4847 		if ((rd_reg16(info, TIR) != patterns[i]) ||
4848 		    (rd_reg16(info, BDR) != patterns[(i+1)%count])) {
4874 		(unsigned short)(rd_reg16(info, TCR) | BIT1));