Lines Matching refs:up
104 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
106 offset <<= up->port.regshift;
108 switch (up->port.iotype) {
110 outb(up->port.hub6 - 1 + offset, up->port.iobase);
111 return inb(up->port.iobase + 1);
114 return readb(up->port.membase + offset);
117 return inb(up->port.iobase + offset);
121 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
136 offset <<= up->port.regshift;
138 switch (up->port.iotype) {
140 outb(up->port.hub6 - 1 + offset, up->port.iobase);
141 outb(value, up->port.iobase + 1);
145 writeb(value, up->port.membase + offset);
149 outb(value, up->port.iobase + offset);
159 #define serial_inp(up, offset) serial_in(up, offset)
160 #define serial_outp(up, offset, value) serial_out(up, offset, value)
166 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
168 serial_out(up, UART_SCR, offset);
169 serial_out(up, UART_ICR, value);
173 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
178 serial_out(up, UART_SCR, offset);
179 value = serial_in(up, UART_ICR);
180 serial_icr_write(up, UART_ACR, up->acr);
191 static int __enable_rsa(struct uart_sunsu_port *up)
196 mode = serial_inp(up, UART_RSA_MSR);
200 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
201 mode = serial_inp(up, UART_RSA_MSR);
206 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
211 static void enable_rsa(struct uart_sunsu_port *up)
213 if (up->port.type == PORT_RSA) {
214 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
215 uart_port_lock_irq(&up->port);
216 __enable_rsa(up);
217 uart_port_unlock_irq(&up->port);
219 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
220 serial_outp(up, UART_RSA_FRR, 0);
230 static void disable_rsa(struct uart_sunsu_port *up)
235 if (up->port.type == PORT_RSA &&
236 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
237 uart_port_lock_irq(&up->port);
239 mode = serial_inp(up, UART_RSA_MSR);
243 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
244 mode = serial_inp(up, UART_RSA_MSR);
249 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
250 uart_port_unlock_irq(&up->port);
265 struct uart_sunsu_port *up =
268 __stop_tx(up);
273 if (up->port.type == PORT_16C950) {
274 up->acr |= UART_ACR_TXDIS;
275 serial_icr_write(up, UART_ACR, up->acr);
281 struct uart_sunsu_port *up =
284 if (!(up->ier & UART_IER_THRI)) {
285 up->ier |= UART_IER_THRI;
286 serial_out(up, UART_IER, up->ier);
292 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
293 up->acr &= ~UART_ACR_TXDIS;
294 serial_icr_write(up, UART_ACR, up->acr);
300 struct uart_sunsu_port *up =
303 up->ier &= ~UART_IER_RLSI;
304 up->port.read_status_mask &= ~UART_LSR_DR;
305 serial_out(up, UART_IER, up->ier);
310 struct uart_sunsu_port *up =
314 uart_port_lock_irqsave(&up->port, &flags);
315 up->ier |= UART_IER_MSI;
316 serial_out(up, UART_IER, up->ier);
317 uart_port_unlock_irqrestore(&up->port, flags);
321 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
323 struct tty_port *port = &up->port.state->port;
329 ch = serial_inp(up, UART_RX);
331 up->port.icount.rx++;
340 up->port.icount.brk++;
341 if (up->port.cons != NULL &&
342 up->port.line == up->port.cons->index)
350 if (uart_handle_break(&up->port))
353 up->port.icount.parity++;
355 up->port.icount.frame++;
357 up->port.icount.overrun++;
362 *status &= up->port.read_status_mask;
364 if (up->port.cons != NULL &&
365 up->port.line == up->port.cons->index) {
367 *status |= up->lsr_break_flag;
368 up->lsr_break_flag = 0;
378 if (uart_handle_sysrq_char(&up->port, ch))
380 if ((*status & up->port.ignore_status_mask) == 0)
390 *status = serial_inp(up, UART_LSR);
397 static void transmit_chars(struct uart_sunsu_port *up)
399 struct circ_buf *xmit = &up->port.state->xmit;
402 if (up->port.x_char) {
403 serial_outp(up, UART_TX, up->port.x_char);
404 up->port.icount.tx++;
405 up->port.x_char = 0;
408 if (uart_tx_stopped(&up->port)) {
409 sunsu_stop_tx(&up->port);
413 __stop_tx(up);
417 count = up->port.fifosize;
419 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
420 uart_xmit_advance(&up->port, 1);
426 uart_write_wakeup(&up->port);
429 __stop_tx(up);
432 static void check_modem_status(struct uart_sunsu_port *up)
436 status = serial_in(up, UART_MSR);
442 up->port.icount.rng++;
444 up->port.icount.dsr++;
446 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
448 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
450 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
455 struct uart_sunsu_port *up = dev_id;
459 uart_port_lock_irqsave(&up->port, &flags);
462 status = serial_inp(up, UART_LSR);
464 receive_chars(up, &status);
465 check_modem_status(up);
467 transmit_chars(up);
469 tty_flip_buffer_push(&up->port.state->port);
471 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
473 uart_port_unlock_irqrestore(&up->port, flags);
484 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
486 unsigned int cur_cflag = up->cflag;
489 up->cflag &= ~CBAUD;
490 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
492 quot = up->port.uartclk / (16 * new_baud);
494 sunsu_change_speed(&up->port, up->cflag, 0, quot);
497 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
500 unsigned char ch = serial_inp(up, UART_RX);
503 if (up->su_type == SU_PORT_KBD) {
505 serio_interrupt(&up->serio, ch, 0);
507 } else if (up->su_type == SU_PORT_MS) {
512 sunsu_change_mouse_baud(up);
519 serio_interrupt(&up->serio, ch, 0);
524 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
529 struct uart_sunsu_port *up = dev_id;
531 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
532 unsigned char status = serial_inp(up, UART_LSR);
535 receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
543 struct uart_sunsu_port *up =
548 uart_port_lock_irqsave(&up->port, &flags);
549 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
550 uart_port_unlock_irqrestore(&up->port, flags);
557 struct uart_sunsu_port *up =
562 status = serial_in(up, UART_MSR);
578 struct uart_sunsu_port *up =
593 serial_out(up, UART_MCR, mcr);
598 struct uart_sunsu_port *up =
602 uart_port_lock_irqsave(&up->port, &flags);
604 up->lcr |= UART_LCR_SBC;
606 up->lcr &= ~UART_LCR_SBC;
607 serial_out(up, UART_LCR, up->lcr);
608 uart_port_unlock_irqrestore(&up->port, flags);
613 struct uart_sunsu_port *up =
618 if (up->port.type == PORT_16C950) {
619 /* Wake up and initialize UART */
620 up->acr = 0;
621 serial_outp(up, UART_LCR, 0xBF);
622 serial_outp(up, UART_EFR, UART_EFR_ECB);
623 serial_outp(up, UART_IER, 0);
624 serial_outp(up, UART_LCR, 0);
625 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
626 serial_outp(up, UART_LCR, 0xBF);
627 serial_outp(up, UART_EFR, UART_EFR_ECB);
628 serial_outp(up, UART_LCR, 0);
633 * If this is an RSA port, see if we can kick it up to the
636 enable_rsa(up);
643 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
644 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
645 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
647 serial_outp(up, UART_FCR, 0);
653 (void) serial_inp(up, UART_LSR);
654 (void) serial_inp(up, UART_RX);
655 (void) serial_inp(up, UART_IIR);
656 (void) serial_inp(up, UART_MSR);
663 if (!(up->port.flags & UPF_BUGGY_UART) &&
664 (serial_inp(up, UART_LSR) == 0xff)) {
665 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
669 if (up->su_type != SU_PORT_PORT) {
670 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
671 IRQF_SHARED, su_typev[up->su_type], up);
673 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
674 IRQF_SHARED, su_typev[up->su_type], up);
677 printk("su: Cannot register IRQ %d\n", up->port.irq);
684 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
686 uart_port_lock_irqsave(&up->port, &flags);
688 up->port.mctrl |= TIOCM_OUT2;
690 sunsu_set_mctrl(&up->port, up->port.mctrl);
691 uart_port_unlock_irqrestore(&up->port, flags);
698 up->ier = UART_IER_RLSI | UART_IER_RDI;
699 serial_outp(up, UART_IER, up->ier);
701 if (up->port.flags & UPF_FOURPORT) {
706 icp = (up->port.iobase & 0xfe0) | 0x01f;
714 (void) serial_inp(up, UART_LSR);
715 (void) serial_inp(up, UART_RX);
716 (void) serial_inp(up, UART_IIR);
717 (void) serial_inp(up, UART_MSR);
724 struct uart_sunsu_port *up =
731 up->ier = 0;
732 serial_outp(up, UART_IER, 0);
734 uart_port_lock_irqsave(&up->port, &flags);
735 if (up->port.flags & UPF_FOURPORT) {
737 inb((up->port.iobase & 0xfe0) | 0x1f);
738 up->port.mctrl |= TIOCM_OUT1;
740 up->port.mctrl &= ~TIOCM_OUT2;
742 sunsu_set_mctrl(&up->port, up->port.mctrl);
743 uart_port_unlock_irqrestore(&up->port, flags);
748 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
749 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
752 serial_outp(up, UART_FCR, 0);
758 disable_rsa(up);
764 (void) serial_in(up, UART_RX);
766 free_irq(up->port.irq, up);
773 struct uart_sunsu_port *up =
808 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
809 up->rev == 0x5201)
812 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
813 if ((up->port.uartclk / quot) < (2400 * 16))
816 else if (up->port.type == PORT_RSA)
822 if (up->port.type == PORT_16750)
829 uart_port_lock_irqsave(&up->port, &flags);
836 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
838 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
840 up->port.read_status_mask |= UART_LSR_BI;
845 up->port.ignore_status_mask = 0;
847 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
849 up->port.ignore_status_mask |= UART_LSR_BI;
855 up->port.ignore_status_mask |= UART_LSR_OE;
862 up->port.ignore_status_mask |= UART_LSR_DR;
867 up->ier &= ~UART_IER_MSI;
868 if (UART_ENABLE_MS(&up->port, cflag))
869 up->ier |= UART_IER_MSI;
871 serial_out(up, UART_IER, up->ier);
873 if (uart_config[up->port.type].flags & UART_STARTECH) {
874 serial_outp(up, UART_LCR, 0xBF);
875 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
877 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
878 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
879 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
880 if (up->port.type == PORT_16750)
881 serial_outp(up, UART_FCR, fcr); /* set fcr */
882 serial_outp(up, UART_LCR, cval); /* reset DLAB */
883 up->lcr = cval; /* Save LCR */
884 if (up->port.type != PORT_16750) {
887 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
889 serial_outp(up, UART_FCR, fcr); /* set fcr */
892 up->cflag = cflag;
894 uart_port_unlock_irqrestore(&up->port, flags);
923 struct uart_sunsu_port *up =
932 port->type = up->type_probed; /* XXX */
982 struct uart_sunsu_port *up = serio->port_data;
989 lsr = serial_in(up, UART_LSR);
993 serial_out(up, UART_TX, ch);
1002 struct uart_sunsu_port *up = serio->port_data;
1007 if (!up->serio_open) {
1008 up->serio_open = 1;
1019 struct uart_sunsu_port *up = serio->port_data;
1023 up->serio_open = 0;
1029 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1035 if (up->su_type == SU_PORT_NONE)
1038 up->type_probed = PORT_UNKNOWN;
1039 up->port.iotype = UPIO_MEM;
1041 uart_port_lock_irqsave(&up->port, &flags);
1043 if (!(up->port.flags & UPF_BUGGY_UART)) {
1053 scratch = serial_inp(up, UART_IER);
1054 serial_outp(up, UART_IER, 0);
1058 scratch2 = serial_inp(up, UART_IER);
1059 serial_outp(up, UART_IER, 0x0f);
1063 scratch3 = serial_inp(up, UART_IER);
1064 serial_outp(up, UART_IER, scratch);
1069 save_mcr = serial_in(up, UART_MCR);
1070 save_lcr = serial_in(up, UART_LCR);
1081 if (!(up->port.flags & UPF_SKIP_TEST)) {
1082 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1083 status1 = serial_inp(up, UART_MSR) & 0xF0;
1084 serial_outp(up, UART_MCR, save_mcr);
1088 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1089 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1090 serial_outp(up, UART_LCR, 0);
1091 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1092 scratch = serial_in(up, UART_IIR) >> 6;
1095 up->port.type = PORT_16450;
1098 up->port.type = PORT_UNKNOWN;
1101 up->port.type = PORT_16550;
1104 up->port.type = PORT_16550A;
1107 if (up->port.type == PORT_16550A) {
1109 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1110 if (serial_in(up, UART_EFR) == 0) {
1111 up->port.type = PORT_16650;
1113 serial_outp(up, UART_LCR, 0xBF);
1114 if (serial_in(up, UART_EFR) == 0)
1115 up->port.type = PORT_16650V2;
1118 if (up->port.type == PORT_16550A) {
1120 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1121 serial_outp(up, UART_FCR,
1123 scratch = serial_in(up, UART_IIR) >> 5;
1131 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1132 serial_outp(up, UART_LCR, 0);
1133 serial_outp(up, UART_FCR,
1135 scratch = serial_in(up, UART_IIR) >> 5;
1137 up->port.type = PORT_16750;
1139 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1141 serial_outp(up, UART_LCR, save_lcr);
1142 if (up->port.type == PORT_16450) {
1143 scratch = serial_in(up, UART_SCR);
1144 serial_outp(up, UART_SCR, 0xa5);
1145 status1 = serial_in(up, UART_SCR);
1146 serial_outp(up, UART_SCR, 0x5a);
1147 status2 = serial_in(up, UART_SCR);
1148 serial_outp(up, UART_SCR, scratch);
1151 up->port.type = PORT_8250;
1154 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1156 if (up->port.type == PORT_UNKNOWN)
1158 up->type_probed = up->port.type; /* XXX */
1164 if (up->port.type == PORT_RSA)
1165 serial_outp(up, UART_RSA_FRR, 0);
1167 serial_outp(up, UART_MCR, save_mcr);
1168 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1171 serial_outp(up, UART_FCR, 0);
1172 (void)serial_in(up, UART_RX);
1173 serial_outp(up, UART_IER, 0);
1176 uart_port_unlock_irqrestore(&up->port, flags);
1186 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1193 if (up->su_type == SU_PORT_KBD) {
1194 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1197 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1200 quot = up->port.uartclk / (16 * baud);
1202 sunsu_autoconfig(up);
1203 if (up->port.type == PORT_UNKNOWN)
1207 up->port.dev->of_node,
1208 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1209 (unsigned long long) up->port.mapbase,
1210 up->port.irq);
1213 serio = &up->serio;
1214 serio->port_data = up;
1217 if (up->su_type == SU_PORT_KBD) {
1226 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1232 serio->dev.parent = up->port.dev;
1237 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1239 sunsu_startup(&up->port);
1254 static void wait_for_xmitr(struct uart_sunsu_port *up)
1258 /* Wait up to 10ms for the character(s) to be sent. */
1260 status = serial_in(up, UART_LSR);
1263 up->lsr_break_flag = UART_LSR_BI;
1270 /* Wait up to 1s for flow control if necessary */
1271 if (up->port.flags & UPF_CONS_FLOW) {
1274 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1281 struct uart_sunsu_port *up =
1284 wait_for_xmitr(up);
1285 serial_out(up, UART_TX, ch);
1295 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1300 if (up->port.sysrq || oops_in_progress)
1301 locked = uart_port_trylock_irqsave(&up->port, &flags);
1303 uart_port_lock_irqsave(&up->port, &flags);
1308 ier = serial_in(up, UART_IER);
1309 serial_out(up, UART_IER, 0);
1311 uart_console_write(&up->port, s, count, sunsu_console_putchar);
1317 wait_for_xmitr(up);
1318 serial_out(up, UART_IER, ier);
1321 uart_port_unlock_irqrestore(&up->port, flags);
1427 struct uart_sunsu_port *up;
1437 up = &sunsu_ports[nr_inst];
1439 up = kzalloc(sizeof(*up), GFP_KERNEL);
1440 if (!up)
1444 up->port.line = nr_inst;
1446 spin_lock_init(&up->port.lock);
1448 up->su_type = type;
1451 up->port.mapbase = rp->start;
1452 up->reg_size = resource_size(rp);
1453 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1454 if (!up->port.membase) {
1456 kfree(up);
1460 up->port.irq = op->archdata.irqs[0];
1462 up->port.dev = &op->dev;
1464 up->port.type = PORT_UNKNOWN;
1465 up->port.uartclk = (SU_BASE_BAUD * 16);
1466 up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
1469 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1470 err = sunsu_kbd_ms_init(up);
1473 up->port.membase, up->reg_size);
1474 kfree(up);
1477 platform_set_drvdata(op, up);
1484 up->port.flags |= UPF_BOOT_AUTOCONF;
1486 sunsu_autoconfig(up);
1489 if (up->port.type == PORT_UNKNOWN)
1492 up->port.ops = &sunsu_pops;
1500 &sunsu_reg, up->port.line,
1502 err = uart_add_one_port(&sunsu_reg, &up->port);
1506 platform_set_drvdata(op, up);
1513 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1514 kfree(up);
1520 struct uart_sunsu_port *up = platform_get_drvdata(op);
1523 if (up->su_type == SU_PORT_MS ||
1524 up->su_type == SU_PORT_KBD)
1529 serio_unregister_port(&up->serio);
1531 } else if (up->port.type != PORT_UNKNOWN)
1532 uart_remove_one_port(&sunsu_reg, &up->port);
1534 if (up->port.membase)
1535 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1538 kfree(up);