218  * @ssp: pointer to a struct sifive_serial_port record
221  * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
225 static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
227 	__ssp_early_writel(v, offs, &ssp->port);
232  * @ssp: pointer to a struct sifive_serial_port record
236  * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
242 static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
244 	return __ssp_early_readl(&ssp->port, offs);
249  * @ssp: pointer to a struct sifive_serial_port
258 static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
260 	return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
266  * @ssp: pointer to a struct sifive_serial_port
269  * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
275 static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
277 	__ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
282  * @ssp: pointer to a struct sifive_serial_port
287  * Context: Any context.  Expects @ssp->port.lock to be held by caller.
289 static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
293 	uart_port_tx_limited(&ssp->port, ch, SIFIVE_TX_FIFO_DEPTH,
295 		__ssp_transmit_char(ssp, ch),
301  * @ssp: pointer to a struct sifive_serial_port
304  * on the SiFive UART referred to by @ssp.
306 static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
308 	if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
311 	ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
312 	__ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
317  * @ssp: pointer to a struct sifive_serial_port
320  * on the SiFive UART referred to by @ssp.
322 static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
324 	if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
327 	ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
328 	__ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
333  * @ssp: pointer to a struct sifive_serial_port
336  * on the UART referred to by @ssp.
338 static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
340 	if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
343 	ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
344 	__ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
349  * @ssp: pointer to a struct sifive_serial_port
352  * on the UART referred to by @ssp.
354 static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
356 	if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
359 	ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
360 	__ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
365  * @ssp: pointer to a struct sifive_serial_port
369  * @ssp, and to return it.  Also returns the RX FIFO empty bit in
375 static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
380 	v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
396  * @ssp: pointer to a struct sifive_serial_port
399  * to by @ssp and pass them up to the Linux serial layer.
401  * Context: Expects ssp->port.lock to be held by caller.
403 static void __ssp_receive_chars(struct sifive_serial_port *ssp)
410 		ch = __ssp_receive_char(ssp, &is_empty);
414 		ssp->port.icount.rx++;
415 		if (!uart_prepare_sysrq_char(&ssp->port, ch))
416 			uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
419 	tty_flip_buffer_push(&ssp->port.state->port);
424  * @ssp: pointer to a struct sifive_serial_port
427  * and target line rate referred to by @ssp and write it into the
430 static void __ssp_update_div(struct sifive_serial_port *ssp)
434 	div = DIV_ROUND_UP(ssp->port.uartclk, ssp->baud_rate) - 1;
436 	__ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
441  * @ssp: pointer to a struct sifive_serial_port
445  * SiFive UART described by @ssp and program it into the UART.  There may
449 static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
452 	if (ssp->baud_rate == rate)
455 	ssp->baud_rate = rate;
456 	__ssp_update_div(ssp);
461  * @ssp: pointer to a struct sifive_serial_port
464  * Program the SiFive UART referred to by @ssp to use @nstop stop bits.
466 static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
475 	v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
478 	__ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
483  * @ssp: pointer to a struct sifive_serial_port
485  * Delay while the UART TX FIFO referred to by @ssp is marked as full.
489 static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
491 	while (sifive_serial_is_txfifo_full(ssp))
501 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
503 	__ssp_disable_txwm(ssp);
508 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
510 	__ssp_disable_rxwm(ssp);
515 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
517 	__ssp_enable_txwm(ssp);
522 	struct sifive_serial_port *ssp = dev_id;
525 	uart_port_lock(&ssp->port);
527 	ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
529 		uart_port_unlock(&ssp->port);
534 		__ssp_receive_chars(ssp);
536 		__ssp_transmit_chars(ssp);
538 	uart_unlock_and_check_sysrq(&ssp->port);
565 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
567 	__ssp_enable_rxwm(ssp);
574 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
576 	__ssp_disable_rxwm(ssp);
577 	__ssp_disable_txwm(ssp);
597 	struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
606 		__ssp_wait_for_xmitr(ssp);
616 		udelay(DIV_ROUND_UP(12 * 1000 * 1000, ssp->baud_rate));
619 	if (event == POST_RATE_CHANGE && ssp->port.uartclk != cnd->new_rate) {
620 		ssp->port.uartclk = cnd->new_rate;
621 		__ssp_update_div(ssp);
631 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
638 		dev_err_once(ssp->port.dev, "only 8-bit words supported\n");
643 		dev_err_once(ssp->port.dev, "parity checking not supported\n");
645 		dev_err_once(ssp->port.dev, "BREAK detection not supported\n");
650 	__ssp_set_stop_bits(ssp, nstop);
654 				  ssp->port.uartclk / 16);
655 	__ssp_update_baud_rate(ssp, rate);
657 	uart_port_lock_irqsave(&ssp->port, &flags);
662 	ssp->port.read_status_mask = 0;
665 	v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
672 		__ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
674 	uart_port_unlock_irqrestore(&ssp->port, flags);
688 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
690 	ssp->port.type = PORT_SIFIVE_V0;
707 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
710 	ch = __ssp_receive_char(ssp, &is_empty);
720 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
722 	__ssp_wait_for_xmitr(ssp);
723 	__ssp_transmit_char(ssp, c);
778 	struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
780 	__ssp_wait_for_xmitr(ssp);
781 	__ssp_transmit_char(ssp, ch);
787 	struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
792 	if (!ssp)
796 		locked = uart_port_trylock_irqsave(&ssp->port, &flags);
798 		uart_port_lock_irqsave(&ssp->port, &flags);
800 	ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
801 	__ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
803 	uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
805 	__ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
808 		uart_port_unlock_irqrestore(&ssp->port, flags);
813 	struct sifive_serial_port *ssp;
822 	ssp = sifive_serial_console_ports[co->index];
823 	if (!ssp)
829 	return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
852 static void __ssp_add_console_port(struct sifive_serial_port *ssp)
854 	sifive_serial_console_ports[ssp->port.line] = ssp;
857 static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
859 	sifive_serial_console_ports[ssp->port.line] = NULL;
868 static void __ssp_add_console_port(struct sifive_serial_port *ssp)
870 static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
907 	struct sifive_serial_port *ssp;
940 	ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
941 	if (!ssp)
944 	ssp->port.dev = &pdev->dev;
945 	ssp->port.type = PORT_SIFIVE_V0;
946 	ssp->port.iotype = UPIO_MEM;
947 	ssp->port.irq = irq;
948 	ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
949 	ssp->port.ops = &sifive_serial_uops;
950 	ssp->port.line = id;
951 	ssp->port.mapbase = mem->start;
952 	ssp->port.membase = base;
953 	ssp->dev = &pdev->dev;
954 	ssp->clk = clk;
955 	ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
957 	r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
965 	ssp->port.uartclk = clk_get_rate(ssp->clk);
966 	ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
967 	__ssp_update_div(ssp);
969 	platform_set_drvdata(pdev, ssp);
974 		     SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
979 		     SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
981 	r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
982 			dev_name(&pdev->dev), ssp);
988 	__ssp_add_console_port(ssp);
990 	r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
999 	__ssp_remove_console_port(ssp);
1000 	free_irq(ssp->port.irq, ssp);
1002 	clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1009 	struct sifive_serial_port *ssp = platform_get_drvdata(dev);
1011 	__ssp_remove_console_port(ssp);
1012 	uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
1013 	free_irq(ssp->port.irq, ssp);
1014 	clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1019 	struct sifive_serial_port *ssp = dev_get_drvdata(dev);
1021 	return uart_suspend_port(&sifive_serial_uart_driver, &ssp->port);
1026 	struct sifive_serial_port *ssp = dev_get_drvdata(dev);
1028 	return uart_resume_port(&sifive_serial_uart_driver, &ssp->port);

Indexes created Sat May 11 20:17:00 MDT 2024