Lines Matching refs:clk_rate
128 unsigned long clk_rate;
1220 unsigned long clk_rate;
1235 clk_rate = get_clk_div_rate(port->se.clk, baud,
1237 if (!clk_rate) {
1244 dev_dbg(port->se.dev, "desired_rate = %u, clk_rate = %lu, clk_div = %u\n",
1245 baud * sampling_rate, clk_rate, clk_div);
1247 uport->uartclk = clk_rate;
1248 port->clk_rate = clk_rate;
1249 dev_pm_opp_set_rate(uport->dev, clk_rate);
1513 if (port->clk_rate)
1514 dev_pm_opp_set_rate(uport->dev, port->clk_rate);