tty/serial/pch_uart.c

208 	void __iomem *membase;
312 			"IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
314 			"IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
316 			"LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
318 			"MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
320 			"LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
322 			"MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
325 			ioread8(priv->membase + PCH_UART_BRCSR));
327 	lcr = ioread8(priv->membase + UART_LCR);
328 	iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
330 			"DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL));
332 			"DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM));
333 	iowrite8(lcr, priv->membase + UART_LCR);
414 	u8 ier = ioread8(priv->membase + UART_IER);
416 	iowrite8(ier, priv->membase + UART_IER);
422 	u8 ier = ioread8(priv->membase + UART_IER);
424 	iowrite8(ier, priv->membase + UART_IER);
464 	iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
465 	iowrite8(dll, priv->membase + PCH_UART_DLL);
466 	iowrite8(dlm, priv->membase + PCH_UART_DLM);
467 	iowrite8(lcr, priv->membase + UART_LCR);
481 	iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR);
483 		 priv->membase + UART_FCR);
484 	iowrite8(priv->fcr, priv->membase + UART_FCR);
533 	iowrite8(PCH_UART_FCR_FIFOE, priv->membase + UART_FCR);
535 		 priv->membase + UART_FCR);
536 	iowrite8(fcr, priv->membase + UART_FCR);
544 	unsigned int msr = ioread8(priv->membase + UART_MSR);
556 	lsr = ioread8(priv->membase + UART_LSR);
557 	for (i = 0, lsr = ioread8(priv->membase + UART_LSR);
559 	     lsr = ioread8(priv->membase + UART_LSR)) {
560 		rbr = ioread8(priv->membase + PCH_UART_RBR);
577 	return ioread8(priv->membase + UART_IIR) &\
583 	return ioread8(priv->membase + UART_LSR);
590 	lcr = ioread8(priv->membase + UART_LCR);
596 	iowrite8(lcr, priv->membase + UART_LCR);
826 		iowrite8(port->x_char, priv->membase + PCH_UART_THR);
835 		iowrite8(ch, priv->membase + PCH_UART_THR);
883 		iowrite8(port->x_char, priv->membase + PCH_UART_THR);
1130 		iowrite8(mcr, priv->membase + UART_MCR);
1361 	pci_iounmap(priv->pdev, priv->membase);
1369 	void __iomem *membase;
1376 	membase = pci_iomap(priv->pdev, 1, 0);
1377 	if (!membase) {
1381 	priv->membase = port->membase = membase;
1437 		status = ioread8(up->membase + UART_LSR);
1450 			unsigned int msr = ioread8(up->membase + UART_MSR);
1469 	u8 lsr = ioread8(priv->membase + UART_LSR);
1474 	return ioread8(priv->membase + PCH_UART_RBR);
1488 	ier = ioread8(priv->membase + UART_IER);
1495 	iowrite8(c, priv->membase + PCH_UART_THR);
1502 	iowrite8(ier, priv->membase + UART_IER);
1538 	iowrite8(ch, priv->membase + PCH_UART_THR);
1567 	ier = ioread8(priv->membase + UART_IER);
1578 	iowrite8(ier, priv->membase + UART_IER);
1601 	if (!port || (!port->iobase && !port->membase))
1692 	priv->port.membase = NULL;