tty/serial/msm_serial.c

196 void msm_write(struct uart_port *port, unsigned int val, unsigned int off)
212 	msm_write(port, 0x06, MSM_UART_MREG);
213 	msm_write(port, 0xF1, MSM_UART_NREG);
214 	msm_write(port, 0x0F, MSM_UART_DREG);
215 	msm_write(port, 0x1A, MSM_UART_MNDREG);
224 	msm_write(port, 0x18, MSM_UART_MREG);
225 	msm_write(port, 0xF6, MSM_UART_NREG);
226 	msm_write(port, 0x0F, MSM_UART_DREG);
227 	msm_write(port, 0x0A, MSM_UART_MNDREG);
275 	msm_write(port, val, UARTDM_DMEN);
420 	msm_write(port, MSM_UART_CR_CMD_RESET_TX_READY, MSM_UART_CR);
428 	msm_write(port, msm_port->imr, MSM_UART_IMR);
441 	msm_write(port, msm_port->imr, MSM_UART_IMR);
447 	msm_write(port, count, UARTDM_NCF_TX);
474 	msm_write(port, val, UARTDM_DMEN);
477 		msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
478 		msm_write(port, MSM_UART_CR_TX_ENABLE, MSM_UART_CR);
487 	msm_write(port, msm_port->imr, MSM_UART_IMR);
537 	msm_write(port, msm_port->imr, MSM_UART_IMR);
543 		msm_write(port, val, UARTDM_DMEN);
548 		msm_write(port, val, UARTDM_DMEN);
577 	msm_write(port, val, UARTDM_DMEN);
582 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
665 	msm_write(uart, msm_port->imr, MSM_UART_IMR);
671 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
672 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
678 		msm_write(uart, val, UARTDM_DMEN);
680 	msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX);
683 		msm_write(uart, val, UARTDM_DMEN);
694 	msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
695 	msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
697 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
698 	msm_write(uart, 0xFFFFFF, UARTDM_DMRX);
699 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
703 	msm_write(uart, msm_port->imr, MSM_UART_IMR);
712 	msm_write(port, msm_port->imr, MSM_UART_IMR);
723 	msm_write(port, msm_port->imr, MSM_UART_IMR);
737 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
790 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
791 	msm_write(port, 0xFFFFFF, UARTDM_DMRX);
792 	msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
811 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
947 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
962 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupt */
966 		msm_write(port, MSM_UART_CR_CMD_RESET_RXBREAK_START, MSM_UART_CR);
972 			msm_write(port, val, MSM_UART_CR);
974 			msm_write(port, val, MSM_UART_CR);
991 	msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */
1013 	msm_write(port, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
1014 	msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
1015 	msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
1016 	msm_write(port, MSM_UART_CR_CMD_RESET_BREAK_INT, MSM_UART_CR);
1017 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
1018 	msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1021 	msm_write(port, mr, MSM_UART_MR1);
1025 		msm_write(port, 0, UARTDM_DMEN);
1036 		msm_write(port, mr, MSM_UART_MR1);
1037 		msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1040 		msm_write(port, mr, MSM_UART_MR1);
1047 		msm_write(port, MSM_UART_CR_CMD_START_BREAK, MSM_UART_CR);
1049 		msm_write(port, MSM_UART_CR_CMD_STOP_BREAK, MSM_UART_CR);
1147 	msm_write(port, entry->code, MSM_UART_CSR);
1161 	msm_write(port, watermark, MSM_UART_IPR);
1165 	msm_write(port, watermark, MSM_UART_RFWR);
1168 	msm_write(port, 10, MSM_UART_TFWR);
1170 	msm_write(port, MSM_UART_CR_CMD_PROTECTION_EN, MSM_UART_CR);
1174 	msm_write(port, MSM_UART_CR_TX_ENABLE | MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
1180 	msm_write(port, msm_port->imr, MSM_UART_IMR);
1183 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1184 		msm_write(port, 0xFFFFFF, UARTDM_DMRX);
1185 		msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
1229 	msm_write(port, data, MSM_UART_MR1);
1259 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupts */
1327 	msm_write(port, mr, MSM_UART_MR2);
1336 	msm_write(port, mr, MSM_UART_MR1);
1477 			msm_write(port, MSM_UART_CR_CMD_FORCE_STALE, MSM_UART_CR);
1481 			msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1482 			msm_write(port, 0xFFFFFF, UARTDM_DMRX);
1483 			msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
1505 	msm_write(port, 0, MSM_UART_IMR);
1513 	msm_write(port, imr, MSM_UART_IMR);
1525 	msm_write(port, 0, MSM_UART_IMR);
1535 	msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF);
1542 	msm_write(port, imr, MSM_UART_IMR);