Lines Matching refs:MSM_UART_CR

61 #define MSM_UART_CR				0x0010
420 msm_write(port, MSM_UART_CR_CMD_RESET_TX_READY, MSM_UART_CR);
477 msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
478 msm_write(port, MSM_UART_CR_TX_ENABLE, MSM_UART_CR);
582 msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
671 msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
672 msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
694 msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
695 msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
697 msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
699 msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
737 msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
790 msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
792 msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
811 msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
947 msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
966 msm_write(port, MSM_UART_CR_CMD_RESET_RXBREAK_START, MSM_UART_CR);
972 msm_write(port, val, MSM_UART_CR);
974 msm_write(port, val, MSM_UART_CR);
1013 msm_write(port, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
1014 msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
1015 msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
1016 msm_write(port, MSM_UART_CR_CMD_RESET_BREAK_INT, MSM_UART_CR);
1017 msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
1018 msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1037 msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1047 msm_write(port, MSM_UART_CR_CMD_START_BREAK, MSM_UART_CR);
1049 msm_write(port, MSM_UART_CR_CMD_STOP_BREAK, MSM_UART_CR);
1170 msm_write(port, MSM_UART_CR_CMD_PROTECTION_EN, MSM_UART_CR);
1174 msm_write(port, MSM_UART_CR_TX_ENABLE | MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
1183 msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1185 msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
1477 msm_write(port, MSM_UART_CR_CMD_FORCE_STALE, MSM_UART_CR);
1481 msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1483 msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);