tty/serial/fsl_linflexuart.c

147 	ier = readl(port->membase + LINIER);
149 	writel(ier, port->membase + LINIER);
156 	ier = readl(port->membase + LINIER);
157 	writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER);
164 	writeb(c, sport->membase + BDRL);
167 	while (((status = readl(sport->membase + UARTSR)) &
172 	writel(status | LINFLEXD_UARTSR_DTFTFF, sport->membase + UARTSR);
197 	ier = readl(port->membase + LINIER);
198 	writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER);
236 	status = readl(sport->membase + UARTSR);
238 		rx = readb(sport->membase + BDRM);
258 		writel(status, sport->membase + UARTSR);
259 		status = readl(sport->membase + UARTSR);
282 	status = readl(sport->membase + UARTSR);
297 	status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;
320 	ier = readl(sport->membase + LINIER);
322 	writel(ier, sport->membase + LINIER);
324 	cr = readl(sport->membase + UARTCR);
326 	writel(cr, sport->membase + UARTCR);
333 	writel(cr1, sport->membase + LINCR1);
336 	while ((readl(sport->membase + LINSR)
350 	writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR);
355 	writel(cr, sport->membase + UARTCR);
359 	writel(cr1, sport->membase + LINCR1);
361 	ier = readl(sport->membase + LINIER);
365 	writel(ier, sport->membase + LINIER);
393 	ier = readl(port->membase + LINIER);
395 	writel(ier, port->membase + LINIER);
410 	cr = readl(port->membase + UARTCR);
414 	cr1 = readl(port->membase + LINCR1);
416 	writel(cr1, port->membase + LINCR1);
419 	while ((readl(port->membase + LINSR)
505 	writel(cr, port->membase + UARTCR);
509 	writel(cr1, port->membase + LINCR1);
560 	cr = readl(port->membase + UARTCR);
562 	writeb(ch, port->membase + BDRL);
565 		while ((readl(port->membase + UARTSR) &
570 		while (readl(port->membase + UARTSR) &
575 		writel((readl(port->membase + UARTSR) |
577 					port->membase + UARTSR);
628 	ier = readl(sport->membase + LINIER);
631 	cr = readl(sport->membase + UARTCR);
633 	writel(cr, sport->membase + UARTCR);
637 	writel(ier, sport->membase + LINIER);
669 	cr = readl(sport->membase + UARTCR);
782 	if (!device->port.membase)
831 	sport->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
832 	if (IS_ERR(sport->membase))
833 		return PTR_ERR(sport->membase);