tty/serial/bcm63xx_uart.c

73 static inline unsigned int bcm_uart_readl(struct uart_port *port,
76 	return __raw_readl(port->membase + offset);
79 static inline void bcm_uart_writel(struct uart_port *port,
82 	__raw_writel(value, port->membase + offset);
88 static unsigned int bcm_uart_tx_empty(struct uart_port *port)
92 	val = bcm_uart_readl(port, UART_IR_REG);
99 static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
103 	val = bcm_uart_readl(port, UART_MCTL_REG);
110 	bcm_uart_writel(port, val, UART_MCTL_REG);
112 	val = bcm_uart_readl(port, UART_CTL_REG);
117 	bcm_uart_writel(port, val, UART_CTL_REG);
123 static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
128 	val = bcm_uart_readl(port, UART_EXTINP_REG);
143 static void bcm_uart_stop_tx(struct uart_port *port)
147 	val = bcm_uart_readl(port, UART_CTL_REG);
149 	bcm_uart_writel(port, val, UART_CTL_REG);
151 	val = bcm_uart_readl(port, UART_IR_REG);
153 	bcm_uart_writel(port, val, UART_IR_REG);
159 static void bcm_uart_start_tx(struct uart_port *port)
163 	val = bcm_uart_readl(port, UART_IR_REG);
165 	bcm_uart_writel(port, val, UART_IR_REG);
167 	val = bcm_uart_readl(port, UART_CTL_REG);
169 	bcm_uart_writel(port, val, UART_CTL_REG);
173  * serial core request to stop rx, called before port shutdown
175 static void bcm_uart_stop_rx(struct uart_port *port)
179 	val = bcm_uart_readl(port, UART_IR_REG);
181 	bcm_uart_writel(port, val, UART_IR_REG);
187 static void bcm_uart_enable_ms(struct uart_port *port)
191 	val = bcm_uart_readl(port, UART_IR_REG);
193 	bcm_uart_writel(port, val, UART_IR_REG);
199 static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
204 	uart_port_lock_irqsave(port, &flags);
206 	val = bcm_uart_readl(port, UART_CTL_REG);
211 	bcm_uart_writel(port, val, UART_CTL_REG);
213 	uart_port_unlock_irqrestore(port, flags);
217  * return port type in string format
219 static const char *bcm_uart_type(struct uart_port *port)
221 	return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
227 static void bcm_uart_do_rx(struct uart_port *port)
229 	struct tty_port *tty_port = &port->state->port;
234 	 * serial port */
242 		iestat = bcm_uart_readl(port, UART_IR_REG);
249 			val = bcm_uart_readl(port, UART_CTL_REG);
251 			bcm_uart_writel(port, val, UART_CTL_REG);
253 			port->icount.overrun++;
260 		cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
261 		port->icount.rx++;
268 				port->icount.brk++;
269 				if (uart_handle_break(port))
274 				port->icount.parity++;
276 				port->icount.frame++;
279 			cstat &= port->read_status_mask;
288 		if (uart_prepare_sysrq_char(port, c))
291 		if ((cstat & port->ignore_status_mask) == 0)
303 static void bcm_uart_do_tx(struct uart_port *port)
309 	val = bcm_uart_readl(port, UART_MCTL_REG);
312 	pending = uart_port_tx_limited(port, ch, port->fifosize - val,
314 		bcm_uart_writel(port, ch, UART_FIFO_REG),
320 	val = bcm_uart_readl(port, UART_IR_REG);
322 	bcm_uart_writel(port, val, UART_IR_REG);
330 	struct uart_port *port;
333 	port = dev_id;
334 	uart_port_lock(port);
336 	irqstat = bcm_uart_readl(port, UART_IR_REG);
338 		bcm_uart_do_rx(port);
341 		bcm_uart_do_tx(port);
346 		estat = bcm_uart_readl(port, UART_EXTINP_REG);
348 			uart_handle_cts_change(port,
351 			uart_handle_dcd_change(port,
355 	uart_unlock_and_check_sysrq(port);
362 static void bcm_uart_enable(struct uart_port *port)
366 	val = bcm_uart_readl(port, UART_CTL_REG);
368 	bcm_uart_writel(port, val, UART_CTL_REG);
374 static void bcm_uart_disable(struct uart_port *port)
378 	val = bcm_uart_readl(port, UART_CTL_REG);
381 	bcm_uart_writel(port, val, UART_CTL_REG);
387 static void bcm_uart_flush(struct uart_port *port)
392 	val = bcm_uart_readl(port, UART_CTL_REG);
394 	bcm_uart_writel(port, val, UART_CTL_REG);
398 	(void)bcm_uart_readl(port, UART_FIFO_REG);
404 static int bcm_uart_startup(struct uart_port *port)
409 	/* mask all irq and flush port */
410 	bcm_uart_disable(port);
411 	bcm_uart_writel(port, 0, UART_IR_REG);
412 	bcm_uart_flush(port);
415 	(void)bcm_uart_readl(port, UART_EXTINP_REG);
418 	val = bcm_uart_readl(port, UART_MCTL_REG);
420 	val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
421 	val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
422 	bcm_uart_writel(port, val, UART_MCTL_REG);
425 	val = bcm_uart_readl(port, UART_CTL_REG);
428 	bcm_uart_writel(port, val, UART_CTL_REG);
434 	bcm_uart_writel(port, val, UART_EXTINP_REG);
437 	ret = request_irq(port->irq, bcm_uart_interrupt, 0,
438 			  dev_name(port->dev), port);
441 	bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
442 	bcm_uart_enable(port);
449 static void bcm_uart_shutdown(struct uart_port *port)
453 	uart_port_lock_irqsave(port, &flags);
454 	bcm_uart_writel(port, 0, UART_IR_REG);
455 	uart_port_unlock_irqrestore(port, flags);
457 	bcm_uart_disable(port);
458 	bcm_uart_flush(port);
459 	free_irq(port->irq, port);
465 static void bcm_uart_set_termios(struct uart_port *port, struct ktermios *new,
472 	uart_port_lock_irqsave(port, &flags);
475 	for (tries = 3; !bcm_uart_tx_empty(port) && tries; tries--)
479 	bcm_uart_disable(port);
480 	bcm_uart_flush(port);
483 	ctl = bcm_uart_readl(port, UART_CTL_REG);
513 	bcm_uart_writel(port, ctl, UART_CTL_REG);
516 	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
517 	quot = uart_get_divisor(port, baud) - 1;
518 	bcm_uart_writel(port, quot, UART_BAUD_REG);
521 	ier = bcm_uart_readl(port, UART_IR_REG);
524 	if (UART_ENABLE_MS(port, new->c_cflag))
527 	bcm_uart_writel(port, ier, UART_IR_REG);
530 	port->read_status_mask = UART_FIFO_VALID_MASK;
532 		port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
533 		port->read_status_mask |= UART_FIFO_PARERR_MASK;
536 		port->read_status_mask |= UART_FIFO_BRKDET_MASK;
538 	port->ignore_status_mask = 0;
540 		port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
542 		port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
544 		port->ignore_status_mask |= UART_FIFO_VALID_MASK;
546 	uart_update_timeout(port, new->c_cflag, baud);
547 	bcm_uart_enable(port);
548 	uart_port_unlock_irqrestore(port, flags);
554 static int bcm_uart_request_port(struct uart_port *port)
563 static void bcm_uart_release_port(struct uart_port *port)
569  * serial core request to do any port required autoconfiguration
571 static void bcm_uart_config_port(struct uart_port *port, int flags)
574 		if (bcm_uart_request_port(port))
576 		port->type = PORT_BCM63XX;
581  * serial core request to check that port information in serinfo are
584 static int bcm_uart_verify_port(struct uart_port *port,
587 	if (port->type != PORT_BCM63XX)
589 	if (port->irq != serinfo->irq)
591 	if (port->iotype != serinfo->io_type)
593 	if (port->mapbase != (unsigned long)serinfo->iomem_base)
602 static bool bcm_uart_tx_full(struct uart_port *port)
606 	val = bcm_uart_readl(port, UART_MCTL_REG);
608 	return !(port->fifosize - val);
611 static int bcm_uart_poll_get_char(struct uart_port *port)
615 	iestat = bcm_uart_readl(port, UART_IR_REG);
619 	return bcm_uart_readl(port, UART_FIFO_REG);
622 static void bcm_uart_poll_put_char(struct uart_port *port, unsigned char c)
624 	while (bcm_uart_tx_full(port)) {
628 	bcm_uart_writel(port, c, UART_FIFO_REG);
659 static void wait_for_xmitr(struct uart_port *port)
668 		val = bcm_uart_readl(port, UART_IR_REG);
675 	if (port->flags & UPF_CONS_FLOW) {
680 			val = bcm_uart_readl(port, UART_EXTINP_REG);
691 static void bcm_console_putchar(struct uart_port *port, unsigned char ch)
693 	wait_for_xmitr(port);
694 	bcm_uart_writel(port, ch, UART_FIFO_REG);
703 	struct uart_port *port;
707 	port = &ports[co->index];
710 		locked = uart_port_trylock_irqsave(port, &flags);
712 		uart_port_lock_irqsave(port, &flags);
715 	uart_console_write(port, s, count, bcm_console_putchar);
718 	wait_for_xmitr(port);
721 		uart_port_unlock_irqrestore(port, flags);
726  * port and setup it.
730 	struct uart_port *port;
738 	port = &ports[co->index];
739 	if (!port->membase)
744 	return uart_set_options(port, co, baud, parity, bits, flow);
771 	uart_console_write(&dev->port, s, n, bcm_console_putchar);
772 	wait_for_xmitr(&dev->port);
778 	if (!device->port.membase)
808 	struct uart_port *port;
822 	port = &ports[pdev->id];
823 	if (port->membase)
825 	memset(port, 0, sizeof(*port));
827 	port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res_mem);
828 	if (IS_ERR(port->membase))
829 		return PTR_ERR(port->membase);
830 	port->mapbase = res_mem->start;
835 	port->irq = ret;
844 	port->iotype = UPIO_MEM;
845 	port->ops = &bcm_uart_ops;
846 	port->flags = UPF_BOOT_AUTOCONF;
847 	port->dev = &pdev->dev;
848 	port->fifosize = 16;
849 	port->uartclk = clk_get_rate(clk) / 2;
850 	port->line = pdev->id;
851 	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_BCM63XX_CONSOLE);
854 	ret = uart_add_one_port(&bcm_uart_driver, port);
859 	platform_set_drvdata(pdev, port);
865 	struct uart_port *port;
867 	port = platform_get_drvdata(pdev);
868 	uart_remove_one_port(&bcm_uart_driver, port);
869 	/* mark port as free */