thermal/tegra/tegra30-tsensor.c

76 	struct tegra_tsensor *ts;
90 static int tegra_tsensor_hw_enable(const struct tegra_tsensor *ts)
95 	err = reset_control_assert(ts->rst);
97 		dev_err(ts->dev, "failed to assert hardware reset: %d\n", err);
101 	err = clk_prepare_enable(ts->clk);
103 		dev_err(ts->dev, "failed to enable clock: %d\n", err);
109 	err = reset_control_deassert(ts->rst);
111 		dev_err(ts->dev, "failed to deassert hardware reset: %d\n", err);
128 	writel_relaxed(val, ts->regs + 0x40 + TSENSOR_SENSOR0_CONFIG0);
129 	writel_relaxed(val, ts->regs + 0x80 + TSENSOR_SENSOR0_CONFIG0);
134 	clk_disable_unprepare(ts->clk);
139 static int tegra_tsensor_hw_disable(const struct tegra_tsensor *ts)
143 	err = reset_control_assert(ts->rst);
145 		dev_err(ts->dev, "failed to assert hardware reset: %d\n", err);
149 	clk_disable_unprepare(ts->clk);
156 	const struct tegra_tsensor *ts = data;
158 	tegra_tsensor_hw_disable(ts);
164 	const struct tegra_tsensor *ts = tsc->ts;
177 		dev_err_once(ts->dev, "ch%u: counter invalid\n", tsc->id);
190 		dev_err_once(ts->dev, "ch%u: counter overflow\n", tsc->id);
198 	c1 = DIV_ROUND_CLOSEST(ts->calib.a * counter + ts->calib.b, 1000000);
200 	c2 = DIV_ROUND_CLOSEST(ts->calib.p, c1);
201 	c3 = c1 * ts->calib.m;
202 	c4 = ts->calib.n;
209 static int tegra_tsensor_temp_to_counter(const struct tegra_tsensor *ts, int temp)
213 	c1 = DIV_ROUND_CLOSEST(ts->calib.p - temp * 1000, ts->calib.m);
214 	c2 = -ts->calib.r - int_sqrt(ts->calib.r * ts->calib.r - c1);
216 	return DIV_ROUND_CLOSEST(c2 * 1000000 - ts->calib.b, ts->calib.a);
222 	const struct tegra_tsensor *ts = tsc->ts;
235 	high = tegra_tsensor_temp_to_counter(ts, high);
248 tegra_tsensor_handle_channel_interrupt(const struct tegra_tsensor *ts,
251 	const struct tegra_tsensor_channel *tsc = &ts->ch[id];
258 		dev_err_ratelimited(ts->dev, "ch%u: counter overflowed\n", id);
270 	const struct tegra_tsensor *ts = data;
274 	for (i = 0; i < ARRAY_SIZE(ts->ch); i++)
275 		handled |= tegra_tsensor_handle_channel_interrupt(ts, i);
280 static int tegra_tsensor_disable_hw_channel(const struct tegra_tsensor *ts,
283 	const struct tegra_tsensor_channel *tsc = &ts->ch[id];
293 		dev_err(ts->dev, "ch%u: failed to disable zone: %d\n", id, err);
344 static int tegra_tsensor_enable_hw_channel(const struct tegra_tsensor *ts,
347 	const struct tegra_tsensor_channel *tsc = &ts->ch[id];
362 	dev_info_once(ts->dev, "ch%u: PMC emergency shutdown trip set to %dC\n",
365 	hot_trip  = tegra_tsensor_temp_to_counter(ts, hot_trip);
366 	crit_trip = tegra_tsensor_temp_to_counter(ts, crit_trip);
406 		dev_err(ts->dev, "ch%u: failed to enable zone: %d\n", id, err);
422 static int tegra_tsensor_nvmem_setup(struct tegra_tsensor *ts)
429 		dev_err_probe(ts->dev, err, "failed to get ATE version\n");
434 		dev_info(ts->dev, "unsupported ATE version: %u\n", ate_ver);
444 		dev_info_once(ts->dev,
446 		ts->swap_channels = true;
451 		dev_err(ts->dev, "failed to get calibration data: %d\n", err);
469 		dev_err(ts->dev, "invalid calibration data: %d %d %u %u\n",
476 	ts->calib.a = DIV_ROUND_CLOSEST((t2_90C - t1_25C) * 1000000,
479 	ts->calib.b = t1_25C * 1000000 - ts->calib.a * c1_25C;
482 		ts->calib.m =     -2775;
483 		ts->calib.n =   1338811;
484 		ts->calib.p =  -7300000;
486 		ts->calib.m =     -3512;
487 		ts->calib.n =   1528943;
488 		ts->calib.p = -11100000;
492 	ts->calib.r = DIV_ROUND_CLOSEST(ts->calib.n, ts->calib.m * 2);
494 	dev_info_once(ts->dev,
502 static int tegra_tsensor_register_channel(struct tegra_tsensor *ts,
505 	struct tegra_tsensor_channel *tsc = &ts->ch[id];
506 	unsigned int hw_id = ts->swap_channels ? !id : id;
508 	tsc->ts = ts;
510 	tsc->regs = ts->regs + 0x40 * (hw_id + 1);
512 	tsc->tzd = devm_thermal_of_zone_register(ts->dev, id, tsc, &ops);
515 			return dev_err_probe(ts->dev, PTR_ERR(tsc->tzd),
526 	devm_thermal_add_hwmon_sysfs(ts->dev, tsc->tzd);
533 	struct tegra_tsensor *ts;
537 	ts = devm_kzalloc(&pdev->dev, sizeof(*ts), GFP_KERNEL);
538 	if (!ts)
545 	ts->dev = &pdev->dev;
546 	platform_set_drvdata(pdev, ts);
548 	ts->regs = devm_platform_ioremap_resource(pdev, 0);
549 	if (IS_ERR(ts->regs))
550 		return PTR_ERR(ts->regs);
552 	ts->clk = devm_clk_get(&pdev->dev, NULL);
553 	if (IS_ERR(ts->clk))
554 		return dev_err_probe(&pdev->dev, PTR_ERR(ts->clk),
557 	ts->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
558 	if (IS_ERR(ts->rst))
559 		return dev_err_probe(&pdev->dev, PTR_ERR(ts->rst),
562 	err = tegra_tsensor_nvmem_setup(ts);
566 	err = tegra_tsensor_hw_enable(ts);
572 				       ts);
576 	for (i = 0; i < ARRAY_SIZE(ts->ch); i++) {
577 		err = tegra_tsensor_register_channel(ts, i);
590 	for (i = 0; i < ARRAY_SIZE(ts->ch); i++) {
591 		err = tegra_tsensor_enable_hw_channel(ts, i);
598 					"tegra_tsensor", ts);
608 	struct tegra_tsensor *ts = dev_get_drvdata(dev);
612 	for (i = 0; i < ARRAY_SIZE(ts->ch); i++) {
613 		err = tegra_tsensor_disable_hw_channel(ts, i);
618 	err = tegra_tsensor_hw_disable(ts);
626 		tegra_tsensor_enable_hw_channel(ts, i);
633 	struct tegra_tsensor *ts = dev_get_drvdata(dev);
637 	err = tegra_tsensor_hw_enable(ts);
641 	for (i = 0; i < ARRAY_SIZE(ts->ch); i++) {
642 		err = tegra_tsensor_enable_hw_channel(ts, i);