thermal/tegra/soctherm.c

303 	struct tegra_soctherm *ts;
362  * @ts: pointer to a struct tegra_soctherm
368 static inline void ccroc_writel(struct tegra_soctherm *ts, u32 value, u32 reg)
370 	writel(value, (ts->ccroc_regs + reg));
375  * @ts: pointer to a struct tegra_soctherm
380 static inline u32 ccroc_readl(struct tegra_soctherm *ts, u32 reg)
382 	return readl(ts->ccroc_regs + reg);
478 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
485 	temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain;
487 	r = readl(ts->regs + THERMCTL_THERMTRIP_CTL);
491 	writel(r, ts->regs + THERMCTL_THERMTRIP_CTL);
518 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
526 	temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain;
544 	r = readl(ts->regs + reg_off);
550 	writel(r, ts->regs + reg_off);
556 find_throttle_cfg_by_name(struct tegra_soctherm *ts, const char *name)
560 	for (i = 0; ts->throt_cfgs[i].name; i++)
561 		if (!strcmp(ts->throt_cfgs[i].name, name))
562 			return &ts->throt_cfgs[i];
567 static int tsensor_group_thermtrip_get(struct tegra_soctherm *ts, int id)
570 	struct tsensor_group_thermtrips *tt = ts->soc->thermtrips;
576 		for (i = 0; i < ts->soc->num_ttgs; i++) {
588 	struct tegra_soctherm *ts = zone->ts;
607 		if (min_low_temp == tsensor_group_thermtrip_get(ts, sg->id))
619 			if (!ts->throt_cfgs[i].init)
622 			cdev = ts->throt_cfgs[i].cdev;
624 				stc = find_throttle_cfg_by_name(ts, cdev->type);
640 	mutex_lock(&zn->ts->thermctl_lock);
641 	r = readl(zn->ts->regs + THERMCTL_INTR_ENABLE);
643 	writel(r, zn->ts->regs + THERMCTL_INTR_ENABLE);
644 	mutex_unlock(&zn->ts->thermctl_lock);
652 	mutex_lock(&zn->ts->thermctl_lock);
653 	r = readl(zn->ts->regs + THERMCTL_INTR_DISABLE);
655 	writel(r, zn->ts->regs + THERMCTL_INTR_DISABLE);
656 	mutex_unlock(&zn->ts->thermctl_lock);
666 	r = readl(zone->ts->regs + zone->sg->thermctl_lvl0_offset);
668 	writel(r, zone->ts->regs + zone->sg->thermctl_lvl0_offset);
670 	lo = enforce_temp_range(zone->dev, lo) / zone->ts->soc->thresh_grain;
671 	hi = enforce_temp_range(zone->dev, hi) / zone->ts->soc->thresh_grain;
677 	writel(r, zone->ts->regs + zone->sg->thermctl_lvl0_offset);
738 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
743 	temperature = tsensor_group_thermtrip_get(ts, sg->id);
767 		if (!ts->throt_cfgs[i].init)
770 		cdev = ts->throt_cfgs[i].cdev;
772 			stc = find_throttle_cfg_by_name(ts, cdev->type);
798 	struct tegra_soctherm *ts = dev_id;
810 	r = readl(ts->regs + THERMCTL_INTR_STATUS);
811 	writel(r, ts->regs + THERMCTL_INTR_DISABLE);
835 	struct tegra_soctherm *ts = dev_id;
839 	st = readl(ts->regs + THERMCTL_INTR_STATUS);
856 		writel(ex, ts->regs + THERMCTL_INTR_STATUS);
860 			tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_CPU];
866 			tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_GPU];
872 			tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_PLLX];
878 			tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_MEM];
891 		writel(st, ts->regs + THERMCTL_INTR_STATUS);
899  * @ts:		pointer to a struct tegra_soctherm
907 static void soctherm_oc_intr_enable(struct tegra_soctherm *ts,
916 	r = readl(ts->regs + OC_INTR_ENABLE);
934 	writel(r, ts->regs + OC_INTR_ENABLE);
997 	struct tegra_soctherm *ts = arg;
1000 	st = readl(ts->regs + OC_INTR_STATUS);
1011 		writel(st, ts->regs + OC_INTR_STATUS);
1015 			soctherm_oc_intr_enable(ts, THROTTLE_OC1, true);
1018 			soctherm_oc_intr_enable(ts, THROTTLE_OC2, true);
1021 			soctherm_oc_intr_enable(ts, THROTTLE_OC3, true);
1024 			soctherm_oc_intr_enable(ts, THROTTLE_OC4, true);
1045 		writel(st, ts->regs + OC_INTR_STATUS);
1068 	struct tegra_soctherm *ts = arg;
1071 	if (!ts)
1074 	r = readl(ts->regs + OC_INTR_STATUS);
1075 	writel(r, ts->regs + OC_INTR_DISABLE);
1257 	struct tegra_soctherm *ts = platform_get_drvdata(pdev);
1258 	const struct tegra_tsensor *tsensors = ts->soc->tsensors;
1259 	const struct tegra_tsensor_group **ttgs = ts->soc->ttgs;
1265 	for (i = 0; i < ts->soc->num_tsensors; i++) {
1266 		r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG1);
1284 		r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS1);
1290 		r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS0);
1296 		r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG0);
1308 		r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG2);
1315 	r = readl(ts->regs + SENSOR_PDIV);
1318 	r = readl(ts->regs + SENSOR_HOTSPOT_OFF);
1324 	r = readl(ts->regs + SENSOR_TEMP1);
1329 	r = readl(ts->regs + SENSOR_TEMP2);
1335 	for (i = 0; i < ts->soc->num_ttgs; i++) {
1342 			r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
1346 			v = sign_extend32(state, ts->soc->bptt - 1);
1347 			v *= ts->soc->thresh_grain;
1352 			v = sign_extend32(state, ts->soc->bptt - 1);
1353 			v *= ts->soc->thresh_grain;
1393 	r = readl(ts->regs + THERMCTL_STATS_CTL);
1402 		r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
1406 		r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
1410 	r = readl(ts->regs + THERMCTL_THERMTRIP_CTL);
1413 	for (i = 0; i < ts->soc->num_ttgs; i++) {
1417 		state *= ts->soc->thresh_grain;
1421 	r = readl(ts->regs + THROT_GLOBAL_CFG);
1426 	r = readl(ts->regs + THROT_STATUS);
1434 	r = readl(ts->regs + CPU_PSKIP_STATUS);
1435 	if (ts->soc->use_ccroc) {
1510 	struct tegra_soctherm *ts = cdev->devdata;
1513 	r = readl(ts->regs + THROT_STATUS);
1537 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
1538 	struct tsensor_group_thermtrips *tt = ts->soc->thermtrips;
1539 	const int max_num_prop = ts->soc->num_ttgs * 2;
1608 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
1619 	ret = of_property_read_u32(np, ts->soc->use_ccroc ?
1623 		if (ts->soc->use_ccroc &&
1626 		else if (!ts->soc->use_ccroc && val <= 100)
1656 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
1662 		ts->throt_cfgs[i].name = throt_names[i];
1663 		ts->throt_cfgs[i].id = i;
1664 		ts->throt_cfgs[i].init = false;
1680 		stc = find_throttle_cfg_by_name(ts, name);
1703 							 (char *)name, ts,
1722  * @ts: pointer to a struct tegra_soctherm
1732 static void throttlectl_cpu_level_cfg(struct tegra_soctherm *ts, int level)
1756 	r = ccroc_readl(ts, CCROC_THROT_PSKIP_RAMP_CPU_REG(level));
1759 	ccroc_writel(ts, r, CCROC_THROT_PSKIP_RAMP_CPU_REG(level));
1761 	r = ccroc_readl(ts, CCROC_THROT_PSKIP_CTRL_CPU_REG(level));
1765 	ccroc_writel(ts, r, CCROC_THROT_PSKIP_CTRL_CPU_REG(level));
1770  * @ts: pointer to a struct tegra_soctherm
1780 static void throttlectl_cpu_level_select(struct tegra_soctherm *ts,
1786 	switch (ts->throt_cfgs[throt].cpu_throt_level) {
1801 	r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1805 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1809 	writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1814  * @ts: pointer to a struct tegra_soctherm
1824 static void throttlectl_cpu_mn(struct tegra_soctherm *ts,
1831 	depth = ts->throt_cfgs[throt].cpu_throt_depth;
1834 	r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1838 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1840 	r = readl(ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1843 	writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1848  * @ts: pointer to a struct tegra_soctherm
1856 static void throttlectl_gpu_level_select(struct tegra_soctherm *ts,
1861 	level = ts->throt_cfgs[throt].gpu_throt_level;
1863 	r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
1866 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
1869 static int soctherm_oc_cfg_program(struct tegra_soctherm *ts,
1873 	struct soctherm_oc_cfg *oc = &ts->throt_cfgs[throt].oc_cfg;
1882 	writel(r, ts->regs + ALARM_CFG(throt));
1883 	writel(oc->throt_period, ts->regs + ALARM_THROTTLE_PERIOD(throt));
1884 	writel(oc->alarm_cnt_thresh, ts->regs + ALARM_CNT_THRESHOLD(throt));
1885 	writel(oc->alarm_filter, ts->regs + ALARM_FILTER(throt));
1886 	soctherm_oc_intr_enable(ts, throt, oc->intr_en);
1893  * @ts: pointer to a struct tegra_soctherm
1899 static void soctherm_throttle_program(struct tegra_soctherm *ts,
1903 	struct soctherm_throt_cfg stc = ts->throt_cfgs[throt];
1908 	if ((throt >= THROTTLE_OC1) && (soctherm_oc_cfg_program(ts, throt)))
1912 	if (ts->soc->use_ccroc)
1913 		throttlectl_cpu_level_select(ts, throt);
1915 		throttlectl_cpu_mn(ts, throt);
1917 	throttlectl_gpu_level_select(ts, throt);
1920 	writel(r, ts->regs + THROT_PRIORITY_CTRL(throt));
1923 	writel(r, ts->regs + THROT_DELAY_CTRL(throt));
1925 	r = readl(ts->regs + THROT_PRIORITY_LOCK);
1931 	writel(r, ts->regs + THROT_PRIORITY_LOCK);
1936 	struct tegra_soctherm *ts = dev_get_drvdata(dev);
1941 	if (ts->soc->use_ccroc) {
1942 		throttlectl_cpu_level_cfg(ts, TEGRA_SOCTHERM_THROT_LEVEL_LOW);
1943 		throttlectl_cpu_level_cfg(ts, TEGRA_SOCTHERM_THROT_LEVEL_MED);
1944 		throttlectl_cpu_level_cfg(ts, TEGRA_SOCTHERM_THROT_LEVEL_HIGH);
1949 		soctherm_throttle_program(ts, i);
1952 	if (ts->soc->use_ccroc) {
1953 		ccroc_writel(ts, v, CCROC_GLOBAL_CFG);
1955 		v = ccroc_readl(ts, CCROC_SUPER_CCLKG_DIVIDER);
1957 		ccroc_writel(ts, v, CCROC_SUPER_CCLKG_DIVIDER);
1959 		writel(v, ts->regs + THROT_GLOBAL_CFG);
1961 		v = readl(ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER);
1963 		writel(v, ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER);
1969 	writel(v, ts->regs + THERMCTL_STATS_CTL);
2189 		zone->ts = tegra;