staging/vt6655/mac.c

87  *      io_base    - Base Address for MAC
100 	void __iomem *io_base = priv->port_offset;
102 	return !(ioread8(io_base + reg_offset) & mask);
111  *      io_base    - Base Address for MAC
121 	void __iomem *io_base = priv->port_offset;
123 	iowrite8(retry_limit, io_base + MAC_REG_SRT);
132  *      io_base    - Base Address for MAC
143 	void __iomem *io_base = priv->port_offset;
145 	iowrite8(byRetryLimit, io_base + MAC_REG_LRT);
154  *      io_base        - Base Address for MAC
164 	void __iomem *io_base = priv->port_offset;
168 	iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | loopback_mode, io_base + MAC_REG_TEST);
177  *      io_base    - Base Address for MAC
186 	void __iomem *io_base = priv->port_offset;
189 	memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
191 	VT6655_MAC_SELECT_PAGE1(io_base);
194 	memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
197 	VT6655_MAC_SELECT_PAGE0(io_base);
206  *      io_base    - Base Address for MAC
216 	void __iomem *io_base = priv->port_offset;
218 	VT6655_MAC_SELECT_PAGE1(io_base);
220 	memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
223 	VT6655_MAC_SELECT_PAGE0(io_base);
226 	memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
230 	memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
233 	iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG);
236 	memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
241 		  io_base + MAC_REG_TXDMAPTR0);
243 		  io_base + MAC_REG_AC0DMAPTR);
245 		  io_base + MAC_REG_BCNDMAPTR);
247 		  io_base + MAC_REG_RXDMAPTR0);
249 		  io_base + MAC_REG_RXDMAPTR1);
258  *      io_base    - Base Address for MAC
267 	void __iomem *io_base = priv->port_offset;
271 	iowrite8(0x01, io_base + MAC_REG_HOSTCR);
274 		if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
289  *      io_base    - Base Address for MAC
318  *      io_base    - Base Address for MAC
327 	void __iomem *io_base = priv->port_offset;
333 	iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
334 	iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
336 		if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
344 		if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
353 	vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
356 		if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
372  *      io_base    - Base Address for MAC
381 	void __iomem *io_base = priv->port_offset;
386 	iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
388 	iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
391 		if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
399 		if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
408 	vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
412 		if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
428  *      io_base    - Base Address for MAC
437 	void __iomem *io_base = priv->port_offset;
439 	vt6655_mac_reg_bits_off(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
452 	vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
463  *      io_base    - Base Address for MAC
472 	void __iomem *io_base = priv->port_offset;
474 	iowrite32(0, io_base + MAC_REG_IMR);
491  *      io_base    - Base Address for MAC
500 	void __iomem *io_base = priv->port_offset;
502 	vt6655_mac_clear_stck_ds(io_base);
504 	iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
511 	iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL);
513 	iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL);
522  *      io_base        - Base Address for MAC
532 	void __iomem *io_base = priv->port_offset;
536 	org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0);
538 		iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2);
541 		if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
545 	iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0);
547 		iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0);
556  *      io_base        - Base Address for MAC
566 	void __iomem *io_base = priv->port_offset;
570 	org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1);
572 		iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2);
575 		if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
579 	iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1);
581 		iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1);
590  *      io_base        - Base Address for MAC
600 	void __iomem *io_base = priv->port_offset;
604 	org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0);
606 		iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2);
609 		if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
613 	iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0);
615 		iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0);
624  *      io_base        - Base Address for MAC
635 	void __iomem *io_base = priv->port_offset;
639 	org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL);
641 		iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2);
644 		if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
649 	iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR);
651 		iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL);
668  *      io_base    - Base Address for MAC
678 	void __iomem *io_base = priv->port_offset;
682 	iowrite8(0, io_base + MAC_REG_TMCTL0);
683 	iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
684 	iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0);
687 			byValue = ioread8(io_base + MAC_REG_TMCTL0);
690 				iowrite8(0, io_base + MAC_REG_TMCTL0);
695 	iowrite8(0, io_base + MAC_REG_TMCTL0);
704  *      io_base    - Base Address for MAC
715 	void __iomem *io_base = priv->port_offset;
717 	iowrite8(0, io_base + MAC_REG_TMCTL1);
718 	iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
719 	iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1);
725 	void __iomem *io_base = priv->port_offset;
729 	iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
730 	iowrite32(data, io_base + MAC_REG_MISCFFDATA);
731 	iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
736 	void __iomem *io_base = priv->port_offset;
743 	vt6655_mac_reg_bits_off(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
747 		if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE)
763  *      io_base        - Base Address for MAC
777 	void __iomem *io_base = priv->port_offset;
795 	iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
796 	iowrite32(data, io_base + MAC_REG_MISCFFDATA);
797 	iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
810 	iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
811 	iowrite32(data, io_base + MAC_REG_MISCFFDATA);
812 	iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
820 		iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX);
821 		iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
822 		iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
832  *      io_base        - Base Address for MAC
842 	void __iomem *io_base = priv->port_offset;
848 	iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
849 	iowrite32(0, io_base + MAC_REG_MISCFFDATA);
850 	iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);