Lines Matching refs:XD_TRANSFER
75 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
77 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END,
140 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER,
142 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
212 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
214 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END,
542 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
544 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1018 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1020 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1070 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER,
1072 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1132 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1134 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1180 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1182 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1214 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER,
1216 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1249 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1251 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1479 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1481 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1538 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1540 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1737 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER,
1739 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,