Lines Matching refs:rtsx_add_cmd
50 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
51 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
52 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
53 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
56 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
58 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
61 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
118 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
119 rtsx_add_cmd(chip, WRITE_REG_CMD,
121 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
122 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
125 rtsx_add_cmd(chip, WRITE_REG_CMD,
128 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
133 rtsx_add_cmd(chip, WRITE_REG_CMD,
135 rtsx_add_cmd(chip, CHECK_REG_CMD,
174 rtsx_add_cmd(chip, WRITE_REG_CMD,
178 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
180 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
181 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
182 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
183 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
186 rtsx_add_cmd(chip, WRITE_REG_CMD,
188 rtsx_add_cmd(chip, CHECK_REG_CMD,
238 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
239 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
240 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
241 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
244 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
246 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
250 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
253 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
255 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
459 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
461 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
463 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
465 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
467 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
469 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
473 rtsx_add_cmd(chip, WRITE_REG_CMD,
475 rtsx_add_cmd(chip, WRITE_REG_CMD,
477 rtsx_add_cmd(chip, WRITE_REG_CMD,
479 rtsx_add_cmd(chip, WRITE_REG_CMD,
1962 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1974 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1975 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1979 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1982 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1984 rtsx_add_cmd(chip, READ_REG_CMD, MS_device_type, 0, 0);
1985 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_support, 0, 0);
3076 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3077 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3079 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3084 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3086 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3244 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3246 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3248 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3253 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3255 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3687 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4166 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4168 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4169 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4174 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4176 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,