Lines Matching refs:wkaddr
717 dma_addr_t wkaddr = vp9->workspace_paddr;
719 amvdec_write_dos(core, HEVCD_IPP_LINEBUFF_BASE, wkaddr + IPP_OFFSET);
720 amvdec_write_dos(core, VP9_RPM_BUFFER, wkaddr + RPM_OFFSET);
721 amvdec_write_dos(core, VP9_SHORT_TERM_RPS, wkaddr + SH_TM_RPS_OFFSET);
722 amvdec_write_dos(core, VP9_PPS_BUFFER, wkaddr + PPS_OFFSET);
723 amvdec_write_dos(core, VP9_SAO_UP, wkaddr + SAO_UP_OFFSET);
726 wkaddr + SWAP_BUF_OFFSET);
728 wkaddr + SWAP_BUF2_OFFSET);
729 amvdec_write_dos(core, VP9_SCALELUT, wkaddr + SCALELUT_OFFSET);
733 wkaddr + DBLK_PARA_OFFSET);
735 amvdec_write_dos(core, HEVC_DBLK_CFG4, wkaddr + DBLK_PARA_OFFSET);
736 amvdec_write_dos(core, HEVC_DBLK_CFG5, wkaddr + DBLK_DATA_OFFSET);
737 amvdec_write_dos(core, VP9_SEG_MAP_BUFFER, wkaddr + SEG_MAP_OFFSET);
738 amvdec_write_dos(core, VP9_PROB_SWAP_BUFFER, wkaddr + PROB_OFFSET);
739 amvdec_write_dos(core, VP9_COUNT_SWAP_BUFFER, wkaddr + COUNT_OFFSET);
740 amvdec_write_dos(core, LMEM_DUMP_ADR, wkaddr + LMEM_OFFSET);
744 wkaddr + MMU_VBH_OFFSET);
746 wkaddr + MMU_VBH_OFFSET + (MMU_VBH_SIZE / 2));