meson/vdec/codec_h264.c

148 static int codec_h264_can_recycle(struct amvdec_core *core)
150 	return !amvdec_read_dos(core, AV_SCRATCH_7) ||
151 	       !amvdec_read_dos(core, AV_SCRATCH_8);
154 static void codec_h264_recycle(struct amvdec_core *core, u32 buf_idx)
160 	if (!amvdec_read_dos(core, AV_SCRATCH_7))
161 		amvdec_write_dos(core, AV_SCRATCH_7, buf_idx + 1);
163 		amvdec_write_dos(core, AV_SCRATCH_8, buf_idx + 1);
169 	struct amvdec_core *core = sess->core;
174 		dma_alloc_coherent(core->dev, SIZE_WORKSPACE,
180 	h264->sei_vaddr = dma_alloc_coherent(core->dev, SIZE_SEI,
185 	amvdec_write_dos_bits(core, POWER_CTL_VLD, BIT(9) | BIT(6));
188 	amvdec_write_dos(core, AV_SCRATCH_1, workspace_offset);
189 	amvdec_write_dos(core, AV_SCRATCH_G, h264->ext_fw_paddr);
190 	amvdec_write_dos(core, AV_SCRATCH_I, h264->sei_paddr -
194 	amvdec_write_dos(core, AV_SCRATCH_F,
195 			 (amvdec_read_dos(core, AV_SCRATCH_F) & 0xffffffc3) |
198 	amvdec_write_dos(core, MDEC_PIC_DC_THRESH, 0x404038aa);
206 	struct amvdec_core *core = sess->core;
209 		dma_free_coherent(core->dev, SIZE_EXT_FW,
213 		dma_free_coherent(core->dev, SIZE_WORKSPACE,
217 		dma_free_coherent(core->dev, h264->ref_size,
221 		dma_free_coherent(core->dev, SIZE_SEI,
231 	struct amvdec_core *core = sess->core;
240 	h264->ext_fw_vaddr = dma_alloc_coherent(core->dev, SIZE_EXT_FW,
264 	struct amvdec_core *core = sess->core;
265 	u32 seq_info = amvdec_read_dos(core, AV_SCRATCH_2);
272 		u32 ar_info = amvdec_read_dos(core, AV_SCRATCH_3);
287 	struct amvdec_core *core = sess->core;
295 	dev_dbg(core->dev, "max_refs = %u; actual_dpb_size = %u\n",
304 	h264->ref_vaddr = dma_alloc_coherent(core->dev, h264->ref_size,
312 	amvdec_write_dos(core, AV_SCRATCH_1, h264->ref_paddr);
314 	amvdec_write_dos(core, AV_SCRATCH_4, h264->ref_paddr + h264->ref_size);
316 	amvdec_write_dos(core, AV_SCRATCH_0, (h264->max_refs << 24) |
326 	struct amvdec_core *core = sess->core;
334 	parsed_info = amvdec_read_dos(core, AV_SCRATCH_1);
345 	crop_infor = amvdec_read_dos(core, AV_SCRATCH_6);
352 	dev_dbg(core->dev, "frame: %ux%u; crop: %u %u\n",
363 static u32 get_offset_msb(struct amvdec_core *core, int frame_num)
367 	u32 offset_msb = amvdec_read_dos(core, AV_SCRATCH_A + reg_offset);
377 	struct amvdec_core *core = sess->core;
382 	error_count = amvdec_read_dos(core, AV_SCRATCH_D);
385 		dev_warn(core->dev,
387 		amvdec_write_dos(core, AV_SCRATCH_D, 0);
391 		u32 frame_status = amvdec_read_dos(core, AV_SCRATCH_1 + i * 4);
404 			dev_dbg(core->dev, "Buffer %d decode error\n",
412 		offset |= get_offset_msb(core, i);
419 	struct amvdec_core *core = sess->core;
424 	status = amvdec_read_dos(core, AV_SCRATCH_0);
435 		dev_err(core->dev, "H.264 decoder fatal error\n");
438 		size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16;
439 		dev_err(core->dev, "Unsupported video width: %u\n", size);
442 		size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16;
443 		dev_err(core->dev, "Unsupported video height: %u\n", size);
449 		dev_info(core->dev, "Unexpected H264 ISR: %08X\n", cmd);
454 		amvdec_write_dos(core, AV_SCRATCH_0, 0);
457 	if (amvdec_read_dos(core, AV_SCRATCH_J) & SEI_DATA_READY)
458 		amvdec_write_dos(core, AV_SCRATCH_J, 0);
468 	struct amvdec_core *core = sess->core;
470 	amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1);