Lines Matching refs:__u32
160 __u32 vals[IPU3_UAPI_AE_BINS * IPU3_UAPI_AE_COLORS];
225 __u32 cell0:4;
226 __u32 cell1:4;
227 __u32 cell2:4;
228 __u32 cell3:4;
229 __u32 cell4:4;
230 __u32 cell5:4;
231 __u32 cell6:4;
232 __u32 cell7:4;
364 __u32 y1_sign_vec;
385 __u32 y2_sign_vec;
395 __u32 reserved0:8;
396 __u32 y1_nf:4;
397 __u32 reserved1:4;
398 __u32 y2_nf:4;
399 __u32 reserved2:12;
481 __u32 bayer_sign;
520 __u32 num_of_stripes __attribute__((aligned(32)));
522 __u32 num_sets;
524 __u32 size_of_set;
526 __u32 bubble_size;
552 __u32 awb_en __attribute__((aligned(32)));
554 __u32 ae_en;
556 __u32 af_en;
558 __u32 awb_fr_en;
585 __u32 ae_join_buffers;
682 __u32 cf:13;
683 __u32 reserved0:3;
684 __u32 cg:5;
685 __u32 ci:5;
686 __u32 reserved1:1;
687 __u32 r_nf:5;
721 __u32 reserved0:3;
723 __u32 reserved2:3;
760 __u32 bp_thr_gain:5;
761 __u32 reserved0:2;
762 __u32 defect_mode:1;
763 __u32 bp_gain:6;
764 __u32 reserved1:18;
765 __u32 w0_coeff:4;
766 __u32 reserved2:4;
767 __u32 w1_coeff:4;
768 __u32 reserved3:20;
796 __u32 alpha:4;
797 __u32 beta:4;
798 __u32 gamma:4;
799 __u32 reserved0:4;
800 __u32 max_inf:4;
801 __u32 reserved1:7;
802 __u32 gd_enable:1;
803 __u32 bpc_enable:1;
804 __u32 bnr_enable:1;
805 __u32 ff_enable:1;
806 __u32 reserved2:1;
823 __u32 x_sqr_reset;
824 __u32 y_sqr_reset;
859 __u32 column_size;
893 __u32 gd_red:6;
894 __u32 reserved0:2;
895 __u32 gd_green:6;
896 __u32 reserved1:2;
897 __u32 gd_blue:6;
898 __u32 reserved2:10;
899 __u32 gd_black:14;
900 __u32 reserved3:2;
901 __u32 gd_shading:7;
902 __u32 reserved4:1;
903 __u32 gd_support:2;
904 __u32 reserved5:1;
905 __u32 gd_clip:1;
906 __u32 gd_central_weight:4;
941 __u32 dm_en:1;
942 __u32 ch_ar_en:1;
943 __u32 fcc_en:1;
944 __u32 reserved0:13;
945 __u32 frame_width:16;
947 __u32 gamma_sc:5;
948 __u32 reserved1:3;
949 __u32 lc_ctrl:5;
950 __u32 reserved2:3;
951 __u32 cr_param1:5;
952 __u32 reserved3:3;
953 __u32 cr_param2:5;
954 __u32 reserved4:3;
956 __u32 coring_param:5;
957 __u32 reserved5:27;
1006 __u32 enable:1;
1007 __u32 reserved:31;
1100 __u32 ds_c00:2;
1101 __u32 ds_c01:2;
1102 __u32 ds_c02:2;
1103 __u32 ds_c03:2;
1104 __u32 ds_c10:2;
1105 __u32 ds_c11:2;
1106 __u32 ds_c12:2;
1107 __u32 ds_c13:2;
1108 __u32 ds_nf:5;
1109 __u32 reserved0:3;
1110 __u32 csc_en:1;
1111 __u32 uv_bin_output:1;
1112 __u32 reserved1:6;
1163 __u32 init_set_vrt_offst_ul:8;
1164 __u32 shd_enable:1;
1165 __u32 gain_factor:2;
1166 __u32 reserved:21;
1267 __u32 x0:9;
1268 __u32 x1:9;
1269 __u32 a01:9;
1270 __u32 b01:5;
1301 __u32 x0:9;
1302 __u32 x1:9;
1303 __u32 x2:9;
1304 __u32 reserved0:5;
1306 __u32 x3:9;
1307 __u32 x4:9;
1308 __u32 x5:9;
1309 __u32 reserved1:5;
1311 __u32 a01:9;
1312 __u32 a12:9;
1313 __u32 a23:9;
1314 __u32 reserved2:5;
1316 __u32 a34:9;
1317 __u32 a45:9;
1318 __u32 reserved3:14;
1320 __u32 b01:9;
1321 __u32 b12:9;
1322 __u32 b23:9;
1323 __u32 reserved4:5;
1325 __u32 b34:9;
1326 __u32 b45:9;
1327 __u32 reserved5:14;
1341 __u32 x0:9;
1342 __u32 x1:9;
1343 __u32 a01:9;
1344 __u32 reserved1:5;
1346 __u32 b01:8;
1347 __u32 reserved2:24;
1370 __u32 x0:9;
1371 __u32 x1:9;
1372 __u32 x2:9;
1373 __u32 reserved0:5;
1375 __u32 x3:9;
1376 __u32 a01:9;
1377 __u32 a12:9;
1378 __u32 reserved1:5;
1380 __u32 a23:9;
1381 __u32 b01:8;
1382 __u32 b12:8;
1383 __u32 reserved2:7;
1385 __u32 b23:8;
1386 __u32 reserved3:24;
1414 __u32 x0:8;
1415 __u32 x1:8;
1416 __u32 x2:8;
1417 __u32 x3:8;
1419 __u32 x4:8;
1420 __u32 x5:8;
1421 __u32 reserved1:16;
1423 __u32 a01:16;
1424 __u32 a12:16;
1426 __u32 a23:16;
1427 __u32 a34:16;
1429 __u32 a45:16;
1430 __u32 reserved2:16;
1432 __u32 b01:10;
1433 __u32 b12:10;
1434 __u32 b23:10;
1435 __u32 reserved4:2;
1437 __u32 b34:10;
1438 __u32 b45:10;
1439 __u32 reserved5:12;
1491 __u32 horver_diag_coeff:7;
1492 __u32 reserved0:1;
1493 __u32 clamp_stitch:6;
1494 __u32 reserved1:2;
1495 __u32 direct_metric_update:5;
1496 __u32 reserved2:3;
1497 __u32 ed_horver_diag_coeff:7;
1498 __u32 reserved3:1;
1512 __u32 iefd_en:1;
1513 __u32 denoise_en:1;
1514 __u32 direct_smooth_en:1;
1515 __u32 rad_en:1;
1516 __u32 vssnlm_en:1;
1517 __u32 reserved:27;
1535 __u32 nega_lmt_txt:13;
1536 __u32 reserved0:19;
1537 __u32 posi_lmt_txt:13;
1538 __u32 reserved1:19;
1539 __u32 nega_lmt_dir:13;
1540 __u32 reserved2:19;
1541 __u32 posi_lmt_dir:13;
1542 __u32 reserved3:19;
1557 __u32 dir_shrp:7;
1558 __u32 reserved0:1;
1559 __u32 dir_dns:7;
1560 __u32 reserved1:1;
1561 __u32 ndir_dns_powr:7;
1562 __u32 reserved2:9;
1576 __u32 unsharp_weight:7;
1577 __u32 reserved0:1;
1578 __u32 unsharp_amount:9;
1579 __u32 reserved1:15;
1609 __u32 c00:9;
1610 __u32 c01:9;
1611 __u32 c02:9;
1612 __u32 reserved:5;
1624 __u32 c11:9;
1625 __u32 c12:9;
1626 __u32 c22:9;
1627 __u32 reserved:5;
1651 __u32 reserved0:3;
1653 __u32 reserved1:3;
1663 __u32 x2:24;
1664 __u32 reserved:8;
1674 __u32 y2:24;
1675 __u32 reserved:8;
1688 __u32 rad_nf:4;
1689 __u32 reserved0:4;
1690 __u32 rad_inv_r2:7;
1691 __u32 reserved1:17;
1706 __u32 rad_dir_far_sharp_w:8;
1707 __u32 rad_dir_far_dns_w:8;
1708 __u32 rad_ndir_far_dns_power:8;
1709 __u32 reserved:8;
1725 __u32 cu6_pow:7;
1726 __u32 reserved0:1;
1727 __u32 cu_unsharp_pow:7;
1728 __u32 reserved1:1;
1729 __u32 rad_cu6_pow:7;
1730 __u32 reserved2:1;
1731 __u32 rad_cu_unsharp_pow:6;
1732 __u32 reserved3:2;
1745 __u32 rad_cu6_x1:9;
1746 __u32 reserved0:1;
1747 __u32 rad_cu_unsharp_x1:9;
1748 __u32 reserved1:13;
1786 __u32 vs_x0:8;
1787 __u32 vs_x1:8;
1788 __u32 vs_x2:8;
1789 __u32 reserved2:8;
1803 __u32 vs_y1:4;
1804 __u32 reserved0:4;
1805 __u32 vs_y2:4;
1806 __u32 reserved1:4;
1807 __u32 vs_y3:4;
1808 __u32 reserved2:12;
1869 __u32 c00:2;
1870 __u32 c01:2;
1871 __u32 c02:2;
1872 __u32 c03:2;
1873 __u32 c10:2;
1874 __u32 c11:2;
1875 __u32 c12:2;
1876 __u32 c13:2;
1877 __u32 norm_factor:5;
1878 __u32 reserved0:4;
1879 __u32 bin_output:1;
1880 __u32 reserved1:6;
1895 __u32 enable:1;
1896 __u32 yuv_mode:1;
1897 __u32 reserved0:14;
1898 __u32 col_size:12;
1899 __u32 reserved1:4;
1911 __u32 u:13;
1912 __u32 reserved0:3;
1913 __u32 v:13;
1914 __u32 reserved1:3;
1932 __u32 vy:8;
1933 __u32 vu:8;
1934 __u32 vv:8;
1935 __u32 reserved0:8;
1937 __u32 hy:8;
1938 __u32 hu:8;
1939 __u32 hv:8;
1940 __u32 reserved1:8;
1955 __u32 fir_0h:6;
1956 __u32 reserved0:2;
1957 __u32 fir_1h:6;
1958 __u32 reserved1:2;
1959 __u32 fir_2h:6;
1960 __u32 dalpha_clip_val:9;
1961 __u32 reserved2:1;
1998 __u32 a_diag:5;
1999 __u32 reserved0:3;
2000 __u32 a_periph:5;
2001 __u32 reserved1:3;
2002 __u32 a_cent:5;
2003 __u32 reserved2:9;
2004 __u32 enable:1;
2023 __u32 edge_sense_0:13;
2024 __u32 reserved0:3;
2025 __u32 delta_edge_sense:13;
2026 __u32 reserved1:3;
2027 __u32 corner_sense_0:13;
2028 __u32 reserved2:3;
2029 __u32 delta_corner_sense:13;
2030 __u32 reserved3:3;
2049 __u32 gain_pos_0:5;
2050 __u32 reserved0:3;
2051 __u32 delta_gain_posi:5;
2052 __u32 reserved1:3;
2053 __u32 gain_neg_0:5;
2054 __u32 reserved2:3;
2055 __u32 delta_gain_neg:5;
2056 __u32 reserved3:3;
2079 __u32 clip_pos_0:5;
2080 __u32 reserved0:3;
2081 __u32 delta_clip_posi:5;
2082 __u32 reserved1:3;
2083 __u32 clip_neg_0:5;
2084 __u32 reserved2:3;
2085 __u32 delta_clip_neg:5;
2086 __u32 reserved3:3;
2106 __u32 gain_exp:4;
2107 __u32 reserved0:28;
2108 __u32 min_edge:13;
2109 __u32 reserved1:3;
2110 __u32 lin_seg_param:4;
2111 __u32 reserved2:4;
2112 __u32 t1:1;
2113 __u32 t2:1;
2114 __u32 reserved3:6;
2136 __u32 diag_disc_g:4;
2137 __u32 reserved0:4;
2138 __u32 hvw_hor:4;
2139 __u32 dw_hor:4;
2140 __u32 hvw_diag:4;
2141 __u32 dw_diag:4;
2142 __u32 reserved1:8;
2163 __u32 pos_0:13;
2164 __u32 reserved0:3;
2165 __u32 pos_delta:13;
2166 __u32 reserved1:3;
2167 __u32 neg_0:13;
2168 __u32 reserved2:3;
2169 __u32 neg_delta:13;
2170 __u32 reserved3:3;
2212 __u32 en:1;
2213 __u32 blend_shift:3;
2214 __u32 gain_according_to_y_only:1;
2215 __u32 reserved0:11;
2217 __u32 reserved1:3;
2219 __u32 reserved2:3;
2237 __u32 reserved0:4;
2239 __u32 reserved1:4;
2241 __u32 reserved2:4;
2243 __u32 reserved3:4;
2391 __u32 enable:1; /* 0 or 1, disabled or enabled */
2392 __u32 adaptive_treshhold_en:1; /* On IPU3, always enabled */
2394 __u32 reserved1:30;
2408 __u32 x_sqr_reset:24;
2409 __u32 r_normfactor:5;
2410 __u32 reserved5:3;
2412 __u32 y_sqr_reset:24;
2413 __u32 gain_scale:8;
2425 __u32 entry0:6;
2426 __u32 entry1:6;
2427 __u32 entry2:6;
2428 __u32 reserved:14;
2447 __u32 anr_stitch_en;
2584 __u32 knee_y1;
2585 __u32 knee_y2;
2586 __u32 maxfb_y;
2587 __u32 maxfb_u;
2588 __u32 maxfb_v;
2589 __u32 round_adj_y;
2590 __u32 round_adj_u;
2591 __u32 round_adj_v;
2592 __u32 ref_buf_select;
2625 __u32 y0;
2626 __u32 u0;
2627 __u32 v0;
2628 __u32 ydiff;
2629 __u32 udiff;
2630 __u32 vdiff;
2643 __u32 u0;
2644 __u32 v0;
2645 __u32 udiff;
2646 __u32 vdiff;
2656 __u32 strength;
2736 __u32 gdc:1;
2737 __u32 obgrid:1;
2738 __u32 reserved1:30;
2740 __u32 acc_bnr:1;
2741 __u32 acc_green_disparity:1;
2742 __u32 acc_dm:1;
2743 __u32 acc_ccm:1;
2744 __u32 acc_gamma:1;
2745 __u32 acc_csc:1;
2746 __u32 acc_cds:1;
2747 __u32 acc_shd:1;
2748 __u32 reserved2:2;
2749 __u32 acc_iefd:1;
2750 __u32 acc_yds_c0:1;
2751 __u32 acc_chnr_c0:1;
2752 __u32 acc_y_ee_nr:1;
2753 __u32 acc_yds:1;
2754 __u32 acc_chnr:1;
2755 __u32 acc_ytm:1;
2756 __u32 acc_yds2:1;
2757 __u32 acc_tcc:1;
2758 __u32 acc_dpc:1;
2759 __u32 acc_bds:1;
2760 __u32 acc_anr:1;
2761 __u32 acc_awb_fr:1;
2762 __u32 acc_ae:1;
2763 __u32 acc_af:1;
2764 __u32 acc_awb:1;
2765 __u32 reserved3:4;
2767 __u32 lin_vmem_params:1;
2768 __u32 tnr3_vmem_params:1;
2769 __u32 xnr3_vmem_params:1;
2770 __u32 tnr3_dmem_params:1;
2771 __u32 xnr3_dmem_params:1;
2772 __u32 reserved4:1;
2773 __u32 obgrid_param:1;
2774 __u32 reserved5:25;