Lines Matching refs:isc
52 #include "atmel-isc-regs.h"
53 #include "atmel-isc.h"
210 static void isc_sama7g5_config_csc(struct isc_device *isc)
212 struct regmap *regmap = isc->regmap;
215 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc,
217 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc,
219 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc,
221 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc,
223 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc,
225 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc,
229 static void isc_sama7g5_config_cbc(struct isc_device *isc)
231 struct regmap *regmap = isc->regmap;
234 regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc, isc->ctrls.brightness);
235 regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc, isc->ctrls.contrast);
241 static void isc_sama7g5_config_cc(struct isc_device *isc)
243 struct regmap *regmap = isc->regmap;
254 static void isc_sama7g5_config_ctrls(struct isc_device *isc,
257 struct isc_ctrls *ctrls = &isc->ctrls;
265 static void isc_sama7g5_config_dpc(struct isc_device *isc)
267 u32 bay_cfg = isc->config.sd_format->cfa_baycfg;
268 struct regmap *regmap = isc->regmap;
276 static void isc_sama7g5_config_gam(struct isc_device *isc)
278 struct regmap *regmap = isc->regmap;
284 static void isc_sama7g5_config_rlp(struct isc_device *isc)
286 struct regmap *regmap = isc->regmap;
287 u32 rlp_mode = isc->config.rlp_cfg_mode;
289 regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
294 static void isc_sama7g5_adapt_pipeline(struct isc_device *isc)
296 isc->try_config.bits_pipeline &= ISC_SAMA7G5_PIPELINE;
316 static int xisc_parse_dt(struct device *dev, struct isc_device *isc)
325 INIT_LIST_HEAD(&isc->subdev_entities);
370 list_add_tail(&subdev_entity->list, &isc->subdev_entities);
380 struct isc_device *isc;
387 isc = devm_kzalloc(dev, sizeof(*isc), GFP_KERNEL);
388 if (!isc)
391 platform_set_drvdata(pdev, isc);
392 isc->dev = dev;
398 isc->regmap = devm_regmap_init_mmio(dev, io_base, &atmel_isc_regmap_config);
399 if (IS_ERR(isc->regmap)) {
400 ret = PTR_ERR(isc->regmap);
410 "microchip-sama7g5-xisc", isc);
417 isc->gamma_table = isc_sama7g5_gamma_table;
418 isc->gamma_max = 0;
420 isc->max_width = ISC_SAMA7G5_MAX_SUPPORT_WIDTH;
421 isc->max_height = ISC_SAMA7G5_MAX_SUPPORT_HEIGHT;
423 isc->config_dpc = isc_sama7g5_config_dpc;
424 isc->config_csc = isc_sama7g5_config_csc;
425 isc->config_cbc = isc_sama7g5_config_cbc;
426 isc->config_cc = isc_sama7g5_config_cc;
427 isc->config_gam = isc_sama7g5_config_gam;
428 isc->config_rlp = isc_sama7g5_config_rlp;
429 isc->config_ctrls = isc_sama7g5_config_ctrls;
431 isc->adapt_pipeline = isc_sama7g5_adapt_pipeline;
433 isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET;
434 isc->offsets.cbc = ISC_SAMA7G5_CBC_OFFSET;
435 isc->offsets.sub422 = ISC_SAMA7G5_SUB422_OFFSET;
436 isc->offsets.sub420 = ISC_SAMA7G5_SUB420_OFFSET;
437 isc->offsets.rlp = ISC_SAMA7G5_RLP_OFFSET;
438 isc->offsets.his = ISC_SAMA7G5_HIS_OFFSET;
439 isc->offsets.dma = ISC_SAMA7G5_DMA_OFFSET;
440 isc->offsets.version = ISC_SAMA7G5_VERSION_OFFSET;
441 isc->offsets.his_entry = ISC_SAMA7G5_HIS_ENTRY_OFFSET;
443 isc->controller_formats = sama7g5_controller_formats;
444 isc->controller_formats_size = ARRAY_SIZE(sama7g5_controller_formats);
445 isc->formats_list = sama7g5_formats_list;
446 isc->formats_list_size = ARRAY_SIZE(sama7g5_formats_list);
448 /* sama7g5-isc RAM access port is full AXI4 - 32 bits per beat */
449 isc->dcfg = ISC_DCFG_YMBSIZE_BEATS32 | ISC_DCFG_CMBSIZE_BEATS32;
451 /* sama7g5-isc : ISPCK does not exist, ISC is clocked by MCK */
452 isc->ispck_required = false;
454 ret = atmel_isc_pipeline_init(isc);
458 isc->hclock = devm_clk_get(dev, "hclock");
459 if (IS_ERR(isc->hclock)) {
460 ret = PTR_ERR(isc->hclock);
465 ret = clk_prepare_enable(isc->hclock);
471 ret = atmel_isc_clk_init(isc);
473 dev_err(dev, "failed to init isc clock: %d\n", ret);
477 ret = v4l2_device_register(dev, &isc->v4l2_dev);
483 ret = xisc_parse_dt(dev, isc);
489 if (list_empty(&isc->subdev_entities)) {
495 list_for_each_entry(subdev_entity, &isc->subdev_entities, list) {
500 v4l2_async_nf_init(&subdev_entity->notifier, &isc->v4l2_dev);
522 if (video_is_registered(&isc->video_dev))
530 regmap_read(isc->regmap, ISC_VERSION + isc->offsets.version, &ver);
536 atmel_isc_subdev_cleanup(isc);
539 v4l2_device_unregister(&isc->v4l2_dev);
542 clk_disable_unprepare(isc->hclock);
544 atmel_isc_clk_cleanup(isc);
551 struct isc_device *isc = platform_get_drvdata(pdev);
555 atmel_isc_subdev_cleanup(isc);
557 v4l2_device_unregister(&isc->v4l2_dev);
559 clk_disable_unprepare(isc->hclock);
561 atmel_isc_clk_cleanup(isc);
566 struct isc_device *isc = dev_get_drvdata(dev);
568 clk_disable_unprepare(isc->hclock);
575 struct isc_device *isc = dev_get_drvdata(dev);
578 ret = clk_prepare_enable(isc->hclock);
591 { .compatible = "microchip,sama7g5-isc" },