Lines Matching refs:controller
28 struct spi_message *msg = drv_data->controller->cur_msg;
57 spi_finalize_current_transfer(drv_data->controller);
98 chan = drv_data->controller->dma_tx;
105 chan = drv_data->controller->dma_rx;
126 dmaengine_terminate_async(drv_data->controller->dma_rx);
127 dmaengine_terminate_async(drv_data->controller->dma_tx);
165 dmaengine_terminate_async(drv_data->controller->dma_tx);
172 dma_async_issue_pending(drv_data->controller->dma_rx);
173 dma_async_issue_pending(drv_data->controller->dma_tx);
181 dmaengine_terminate_sync(drv_data->controller->dma_rx);
182 dmaengine_terminate_sync(drv_data->controller->dma_tx);
188 struct spi_controller *controller = drv_data->controller;
195 controller->dma_tx = dma_request_slave_channel_compat(mask,
197 if (!controller->dma_tx)
200 controller->dma_rx = dma_request_slave_channel_compat(mask,
202 if (!controller->dma_rx) {
203 dma_release_channel(controller->dma_tx);
204 controller->dma_tx = NULL;
213 struct spi_controller *controller = drv_data->controller;
215 if (controller->dma_rx) {
216 dmaengine_terminate_sync(controller->dma_rx);
217 dma_release_channel(controller->dma_rx);
218 controller->dma_rx = NULL;
220 if (controller->dma_tx) {
221 dmaengine_terminate_sync(controller->dma_tx);
222 dma_release_channel(controller->dma_tx);
223 controller->dma_tx = NULL;