Lines Matching refs:host
58 struct spi_controller *host;
86 u32 host;
93 host = mt7621_spi_read(rs, MT7621_SPI_MASTER);
94 host |= MASTER_RS_SLAVE_SEL | MASTER_MORE_BUFMODE;
95 host &= ~MASTER_FULL_DUPLEX;
96 mt7621_spi_write(rs, MT7621_SPI_MASTER, host);
160 static int mt7621_spi_prepare_message(struct spi_controller *host,
163 struct mt7621_spi *rs = spi_controller_get_devdata(host);
269 static int mt7621_spi_transfer_one(struct spi_controller *host,
273 struct mt7621_spi *rs = spi_controller_get_devdata(host);
319 struct spi_controller *host;
338 host = devm_spi_alloc_host(&pdev->dev, sizeof(*rs));
339 if (!host) {
340 dev_info(&pdev->dev, "host allocation failed\n");
344 host->mode_bits = SPI_LSB_FIRST;
345 host->flags = SPI_CONTROLLER_HALF_DUPLEX;
346 host->setup = mt7621_spi_setup;
347 host->prepare_message = mt7621_spi_prepare_message;
348 host->set_cs = mt7621_spi_set_native_cs;
349 host->transfer_one = mt7621_spi_transfer_one;
350 host->bits_per_word_mask = SPI_BPW_MASK(8);
351 host->dev.of_node = pdev->dev.of_node;
352 host->max_native_cs = MT7621_NATIVE_CS_COUNT;
353 host->num_chipselect = MT7621_NATIVE_CS_COUNT;
354 host->use_gpio_descriptors = true;
356 dev_set_drvdata(&pdev->dev, host);
358 rs = spi_controller_get_devdata(host);
360 rs->host = host;
371 return devm_spi_register_controller(&pdev->dev, host);