Lines Matching defs:ccr
66 u16 ccr;
87 * Because psc->ccr is defined as 16bit register instead of 32bit
90 ccr = in_be16((u16 __iomem *)&psc->ccr);
91 ccr &= 0xFF00;
93 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
95 ccr |= (MCLK / 1000000 - 1) & 0xFF;
96 out_be16((u16 __iomem *)&psc->ccr, ccr);
269 out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */