Lines Matching refs:slot

779 static inline u8 read_rxram_slot_u8(struct bcm_qspi *qspi, int slot)
781 u32 slot_offset = MSPI_RXRAM + (slot << 3) + 0x4;
787 static inline u16 read_rxram_slot_u16(struct bcm_qspi *qspi, int slot)
790 u32 lsb_offset = reg_offset + (slot << 3) + 0x4;
791 u32 msb_offset = reg_offset + (slot << 3);
797 static inline u32 read_rxram_slot_u32(struct bcm_qspi *qspi, int slot)
800 u32 offset = reg_offset + (slot << 3);
809 static inline u64 read_rxram_slot_u64(struct bcm_qspi *qspi, int slot)
812 u32 lsb_offset = reg_offset + (slot << 3) + 0x4;
813 u32 msb_offset = reg_offset + (slot << 3);
827 int slot;
839 for (slot = 0; slot < slots; slot++) {
844 buf[tp.byte] = read_rxram_slot_u8(qspi, slot);
852 slot);
860 slot);
869 slot);
883 static inline void write_txram_slot_u8(struct bcm_qspi *qspi, int slot,
886 u32 reg_offset = MSPI_TXRAM + (slot << 3);
892 static inline void write_txram_slot_u16(struct bcm_qspi *qspi, int slot,
896 u32 msb_offset = reg_offset + (slot << 3);
897 u32 lsb_offset = reg_offset + (slot << 3) + 0x4;
903 static inline void write_txram_slot_u32(struct bcm_qspi *qspi, int slot,
907 u32 msb_offset = reg_offset + (slot << 3);
912 static inline void write_txram_slot_u64(struct bcm_qspi *qspi, int slot,
916 u32 msb_offset = reg_offset + (slot << 3);
917 u32 lsb_offset = reg_offset + (slot << 3) + 0x4;
925 static inline u32 read_cdram_slot(struct bcm_qspi *qspi, int slot)
927 return bcm_qspi_read(qspi, MSPI, MSPI_CDRAM + (slot << 2));
930 static inline void write_cdram_slot(struct bcm_qspi *qspi, int slot, u32 val)
932 bcm_qspi_write(qspi, MSPI, (MSPI_CDRAM + (slot << 2)), val);
939 int slot = 0, tstatus = 0;
947 while (!tstatus && slot < MSPI_NUM_CDRAM) {
953 write_txram_slot_u8(qspi, slot, val);
959 write_txram_slot_u16(qspi, slot, val);
965 write_txram_slot_u32(qspi, slot, val);
975 write_txram_slot_u64(qspi, slot, val);
992 write_cdram_slot(qspi, slot, mspi_cdram);
996 slot++;
999 if (!slot) {
1004 dev_dbg(&qspi->pdev->dev, "submitting %d slots\n", slot);
1006 bcm_qspi_write(qspi, MSPI, MSPI_ENDQP, slot - 1);
1018 mspi_cdram = read_cdram_slot(qspi, slot - 1) &
1020 write_cdram_slot(qspi, slot - 1, mspi_cdram);
1032 return slot;