drivers/soundwire/intel.c

548 	 * WORKAROUND: on all existing Intel controllers, pdi
550 	 * supports 8 channels. Performing hardcoding for pdi
563 				   struct sdw_cdns_pdi *pdi,
570 		pdi->ch_count = intel_pdi_get_ch_cap(sdw, pdi->num);
571 		ch_count += pdi->ch_count;
572 		pdi++;
595 intel_pdi_shim_configure(struct sdw_intel *sdw, struct sdw_cdns_pdi *pdi)
602 	pdi->intel_alh_id = (link_id * 16) + pdi->num + 3;
603 	if (pdi->num >= 2)
604 		pdi->intel_alh_id += 2;
610 	if (pdi->type != SDW_STREAM_PCM)
613 	if (pdi->dir == SDW_DATA_DIR_RX)
618 	u32p_replace_bits(&pdi_conf, pdi->intel_alh_id, SDW_SHIM_PCMSYCM_STREAM);
619 	u32p_replace_bits(&pdi_conf, pdi->l_ch_num, SDW_SHIM_PCMSYCM_LCHN);
620 	u32p_replace_bits(&pdi_conf, pdi->h_ch_num, SDW_SHIM_PCMSYCM_HCHN);
622 	intel_writew(shim, SDW_SHIM_PCMSYCHM(link_id, pdi->num), pdi_conf);
626 intel_pdi_alh_configure(struct sdw_intel *sdw, struct sdw_cdns_pdi *pdi)
633 	pdi->intel_alh_id = (link_id * 16) + pdi->num + 3;
634 	if (pdi->num >= 2)
635 		pdi->intel_alh_id += 2;
638 	conf = intel_readl(alh, SDW_ALH_STRMZCFG(pdi->intel_alh_id));
641 	u32p_replace_bits(&conf, pdi->ch_count - 1, SDW_ALH_STRMZCFG_CHN);
643 	intel_writel(alh, SDW_ALH_STRMZCFG(pdi->intel_alh_id), conf);
678 	struct sdw_cdns_pdi *pdi;
694 	pdi = sdw_cdns_alloc_pdi(cdns, &cdns->pcm, ch, dir, dai->id);
696 	if (!pdi) {
702 	intel_pdi_shim_configure(sdw, pdi);
703 	intel_pdi_alh_configure(sdw, pdi);
704 	sdw_cdns_config_stream(cdns, ch, dir, pdi);
706 	/* store pdi and hw_params, may be needed in prepare step */
709 	dai_runtime->pdi = pdi;
714 				  pdi->intel_alh_id);
732 	pconfig->num = pdi->num;
784 		intel_pdi_shim_configure(sdw, dai_runtime->pdi);
785 		intel_pdi_alh_configure(sdw, dai_runtime->pdi);
786 		sdw_cdns_config_stream(cdns, ch, dir, dai_runtime->pdi);
792 					  dai_runtime->pdi->intel_alh_id);
822 	dai_runtime->pdi = NULL;